Table of Contents
Advertisement
have occurred). Loading IRC always indicates that an instruction is beginning execu-
tion — the opcode is loaded into IRC by the transfer.
In some cases, instructions using immediate addressing begin executing and initiate
a second pipeline advance at the same time. IPIPE will not be negated between the
two indications, which implies the need for a state machine to track the state of IPIPE.
The state machine can be resynchronized during periods of inactivity on the signal.
7.3.3 Opcode Tracking during Loop Mode
IPIPE and IFETCH continue to work normally during loop mode. IFETCH indicates all
instruction fetches up through the point that data begins recirculating within the instruc-
tion pipeline. IPIPE continues to signal the start of instructions and the use of exten-
sion words even though data is being recirculated internally. IFETCH returns to normal
operation with the first fetch after exiting loop mode.
CPU32
REFERENCE MANUAL
DEVELOPMENT SUPPORT
MOTOROLA
7-27
Advertisement
Table of Contents
