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RTE
Operation:
Assembler
Syntax:
Attributes:
Description:
frame located at the top of the stack into the processor. The instruction examines the
stack format field in the format/offset word to determine how much information must
be restored.
Condition Codes:
Set according to the condition code bits in the status register value restored from the
stack.
Instruction Format:
15
14
13
0
1
0
Format/Offset word (in stack frame):
15
14
13
FORMAT
Format Field of Format/Offset Word:
Contains the format code, which implies the stack frame size (including the format/off-
set word).
0000 — Short Format, removes four words. Loads the status register and the
program counter from the stack frame.
0001 — Throwaway Format, removes four words. Loads the status register
from the stack frame and switches to the active system stack. Continues the
instruction using the active system stack.
0010 — Instruction Error Format, removes six words. Loads the status register
and the program counter from the stack frame and discards the other words.
1000 — MC68010 Long Format. The MC68020 takes a format error exception.
1001 — Coprocessor Mid-Instruction Format, removes 10 words. Resumes
execution of coprocessor instruction.
1010 — MC68020 Short Format, removes 16 words and resumes instruction
execution.
1011 — MC68020 Long Format, removes 46 words and resumes instruction
execution.
Any other value in this field causes the processor to take a format error exception.
CPU32
REFERENCE MANUAL
Return from Exception
(Privileged Instruction)
If supervisor state
then (SP) → SR; SP + 2 → SP; (SP) → PC;
SP + 4 → SP;
restore state and de-allocate stack according to (SP)
else TRAP
RTE
Unsized
Loads the processor state information stored in the exception stack
12
11
10
9
0
1
1
1
12
11
10
9
0
0
INSTRUCTION SET
8
7
6
5
0
0
1
1
8
7
6
5
VECTOR OFFSET
RTE
4
3
2
1
1
0
0
1
4
3
2
1
MOTOROLA
0
1
0
4-137
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