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3.6.3 Manual Power Save Mode
To use the Manual Power Save Mode, set the Super Power Save Mode setting to Manual.
When the power save key installed on the Operation panel PBA is pressed, the Sub-CPU
(IC37) causes the PWRSVREQ signal to go LOW and outputs it to the I/OP-2 GA (IC48).
At this time, the I/OP-2 GA (IC48) assumes the super power save reserved state until the
process in execution ends. It causes the LEDBLK signal to go LOW and outputs it to the Sub-
CPU. Upon receipt of the LEDBLK signal is input, the Sub-CPU makes the PWRSVLED signal
to go LOW to light the power save LED on the Operation panel PBA. When the power save key
is pressed again while the power save LED is lighting, the super power save reserved state will
be deactivated to turn off the power save LED.
When the process in execution ends, the super power save reserved state changes to the
super power save state or the super power save is cancelled depending on the following condi-
tions.
• An error has occurred or image data is held in the PIX-DRAM (IC25) (the super power
save state cannot be assumed).
The I/OP-2 GA causes the PWRSVNACK signal to be HIGH and outputs it to the Sub-
CPU. The Sub-CPU causes the PWRSVREQ signal to be HIGH to cancel the power
save reserved state. (The power save LED goes out.)
• Normal state or paper empty error (the super power save state can be assumed).
The I/OP-2 GA causes the PWRSVACK signal to be HIGH and outputs it to the Sub-
CPU. The Sub-CPU causes the PWRSVREQ signal to be HIGH to cancel the super
power save reserved state. Then it causes the PWSV signal to be LOW to cut off the
supply of power from the LVPS to other than the super power save circuit. This allows
the super power save state to be assumed to light the power save LED.
DP120F/DP125F Circuit Description
7-38
March 2000 © TOSHIBA TEC
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