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SECTION 3
DIAGRAMS
3-1. BLOCK DIAGRAM
A/® CONVERTER
1c30i
DIGITAL
SIGNAL
BUFFER
10101
ISOLATION
AMP
1C102 (1/2)
INVERTER
ICt02 (2/2)
CNtOt-1t
LINE
IN
=>——o—_D—
SPECTRUM
ANALYZER
16304
q
CLKC
OD eKR
(14) (peLkz
CLOCK
GENERATOR
Bt
LOW-PASS
FILTER
is
16KHz
al
-
|
BAND~PASS
FILTER
-
PROCESSOR
1¢302
SERIAL
QUTPUT
INTERFACE
LP
FILTER
DECIMATION
FILTER
CALIBRATION
SRAM
B+ (SV)
B~ (-SV)
(6)
@
63Hz
ae
BAN®-PASS
FILTER
160Hz
Bigs BANO-PASS FILTER
400H2
Ee
BANB-PASS FILTER
ikHz
1KHz
|__|
BANO-PASS FILTER
Gi) sP3
160Hz
C)
@)
(3)
400Hz
©)
©)
2. SKHz
|_|
BAND-PASS FILTER
6. 3KHz
BAND-PASS FILTER
BUZZER
SRIVE
| |
BZ301
Q301
SP
BACK
UP 8ET
Bt
Q311
B+ (+5V)
6. 3KHz
16KHz
SYSTEM
Sor BU GY
CONTROL
1C305
(+15)
(LE®)
B+
(LAMP)
LCH601
LIQUIN
CRYSTAL
DISPLAY
02
SWITCH
Q310, 446
Bt
C601, 602)
"B+ SWITCH
Bt
a4ot, 402
SWITCH
Q403
B+
Bt
SWITCH
- 0302, 303
LCB ARIVE
+5V:
1Cé0t
oth
BIGITAL
SIGNAL
PROCESSOR
1C307
9~-12+14-18
2
LEO/LAMP
COLOR 0
DRIVE
a
q
0601
x30
2601-618
INVERTER
:
Q312
o< |
(8) INH
Lea
Rive
Ee
-
Till
=
Ta
(A Eh MR
+ See
peak fed
ve
a,
eee
Bt
as
ee Se
"sv
6
6
=
a
e
8
OD—_@—@—WD
=z
PLé01-608
REMOTE
SWITCH
Q411. 412
LE®/LAMP
ARIVE
Qé02
(13) BUS ON
CLK OUT
SATA
OUT
BATA
IN
RESET
CONVERTER (FRONT)
lie
18-BIT
eee
(2)
SERIAL-PARALLEL
>|
one |
(18)
a>
&
SHIFT RESISTER
©)
Sit
B/A
CONVERTER (SUB-WOOFER)
Ic3tl
18-BIT
SHIFT
RESISTER
.
SERIAL~PARALLEL
re nex
CONTROL
LOGIC
10309
E>
<BCK |
CONTROL
LOGIC
65)
B/A
CONVERTER (REAR)
IC310
a
fee
=
RESISTER
BUS BATA (6)
BUS ON OUT (1)
LINK
OFF
SWITCH
Qs01
Bt
@15v)
LOW-PASS
FILTER
10103 (172)
hg
o>)
ee
LOW-PASS
FILTER
10104 (1/2)
5 Sa OP aaes
LOW-PASS.
FILTER
10105 (172)
Lead
o->—o
a:
7401
$c-ac
CONVERTER
TRANSFORMER
XDP-766EQ
LOW-PASS
FILTER
1€103 (2/2)
CN101-2
$7
—_—®) HE? ——
)
LY
©)
HUTING
ATTENUATOR
@Q102
Q101
LOW-PASS
FILTER
10104
(272)
|
oe
—
6) CNi02~1
ae,
ee
(Or
muting
(7P\ ATTENUATOR
)
104
()
Q103
LOW-PASS
FILTER
ICt0S (2/2)
cee
Sai
(\
MUTING
)
atos
FRONT
ATT
ORIVE
Q307
REAR
ATT
ARIVE
Q508
LINK
OFF
RESET
BUS
CONTROL
CLK
BATA
CNSO2
LINK
OFF
6C-8C
CONVERTER
10401
Q409, 410
"L401
@ REMOTE
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