Sony XDP-766EQ Service Manual page 19

Digital signal processor
Table of Contents

Advertisement

IC601, 602 «4 PD7228AG-12
Powe] pwnme [w]e
C38 — C41
om
Output terminal for LCD column drive signal terminal.
C42 — C49/
LCD column/low drive signal output terminal.
5 = 12
;
:
R15 — R8
Designate it as eihter low or column terminal with SMM command.
13 — 20
R15 — R8/
LCD low drive signal (RO ~ R7 and R8 — R15) output terminal.
R7 —RO
Designate it as eihter low drive signal output with SMM command.
Da [eid
«Neen ory
SCSCSC~—"~SC"~"Ss~"~*s*sS~SCS
Standard voltage input terminal for deciding voltage level of LCD low/column drive signal.
Switching terminal for parallel/serial.
"H": Parallel,
"L" : Serial
SYNC
1/0
Synchronous signal input/output terminal for matching LCD drive exchange signal
(low/column) phase and frame cycle.
.
BUSY
noe
Busy signal output terminal
Standard voltage input terminal for deciding voltage level of LCD low/column drive signal.
ra
3
Case
| 34 | vss
| 35 | STBSCK
|__| Inputterminal forstrobe signal/serilclock,
p36 | op
| 38 | CAI
ae
Input terminal for command/data.
"H" : Command input,
"L" : Data input -
Input terminal for assigning specific addresses in order to select individual
~PD7228A
chips.
A
Input terminal for low active chip select.
RESET
Input terminal for high active reset signal.
CLOCK
Input terminal for the external clock.
Tse
P= Pra
Output terminal for LCD column drive signal.

Advertisement

Table of Contents
loading

Table of Contents