Shift Register - GE PACSystems RX7i Cpu Programmer's Reference Manual

Hide thumbs Also See for PACSystems RX7i:
Table of Contents

Advertisement

Chapter 4. Ladder Diagram (LD) Programming
4.8.16

Shift Register

When the Shift Register (SHFR_BIT, SHFR_DWORD, or SHFR_WORD)
function receives power and the R operand does not, SHFR shifts one or
more data BITs, data DWORDs, or data WORDs from a reference location
into a specified area of memory. A contiguous section of memory serves
as a shift register. For example, one word might be shifted into an area of
memory with a specified length of five words. As a result of this shift,
another word of data would be shifted out of the end of the memory area.
The reset input (R) takes precedence over the function enable input. When the reset is active, all
references beginning at the shift register (ST) up to the length specified, are filled with zeroes.
If the function receives power flow and R is not active, each BIT, DWORD, or WORD of the shift
register is moved to the next highest reference. The elements shifted out of ST are shifted into Q. The
highest reference of IN is shifted into the vacated element starting at ST.
Note: The contents of the shift register are accessible throughout the program because they are
overlaid on absolute locations in logic addressable memory.
The function passes power to the right whenever it receives power flow and the R operand does not.
168
PACSystems* RX7i, RX3i and RSTi-EP CPU Programmer's Reference Manual
The use of overlapping input and output reference
address ranges in multiword functions is not
recommended, as it may produce unexpected results.
Warning
Mnemonics:
SHFR_BIT
SHFR_DWORD
SHFR_WORD
GFK-2950C

Advertisement

Table of Contents
loading

This manual is also suitable for:

Pacsystems rx3iPacsystems rsti-ep

Table of Contents