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6 INITERRUPT CONTROLLER
D[7:0]
EIFT[7:0]: Interrupt Flags (for Level Trigger)
These are interrupt flags indicating the interrupt factor occurrence status.
1(R):
Interrupt factor present
0(R):
No interrupt factor (default)
1(W):
Disabled
0(W):
Disabled
Refer to the description for IIFT[7:0].
Note that these interrupts must be set to level trigger mode in the ITC_ELVx registers (0x4306 to
0x430c). To reset the interrupt flags, rather than writing 1 to the bit, set the interrupt flag to 1 within the
peripheral module.
Interrupt flag
EIFT0 (D0)
EIFT1 (D1)
EIFT2 (D2)
EIFT3 (D3)
EIFT4 (D4)
EIFT7 (D7)
Note: The interrupt flags are not reset even if maskable interrupt requests are accepted by the
S1C17 core and branched to interrupt processing routines. Note that returning from an inter-
rupt processing routine using the reti command without resetting the interrupt flags using
the program will generate the same interrupt. Interrupt flags set to level trigger must be reset
by the control register within the peripheral module.
42
Table 6.7.3: Hardware interrupt factors and interrupt flags
P0 port interrupt: P00 to P07 port input
P1 port interrupt: P10 to P17 port input
Stopwatch timer interrupt: 100 Hz/10 Hz/1 Hz signal
Clock timer interrupt: 32 Hz/8 Hz/2 Hz/1 Hz signal
8-bit OSC1 timer interrupt: Compare match
PWM & capture timer interrupt: Compare A/Compare B match
Hardware interrupt factor
EPSON
S1C17001 TECHNICAL MANUAL
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