Table of Contents
Advertisement
Communication start
Start
condition
Register setting
PCLK
T16 Ch.2 output
SCL (input)
SCL (output)
SDA (input)
SDA (output)
STRT
STP
TXE
RXE
TBUSY
RBUSY
RBRDY
RTACK
Shift register
RTDT[7:0]
Interrupt
Figure 20.5.7: I
ACK transmission
PCLK
T16 Ch.2 output
SCL (input)
SCL (output)
SDA (input)
D0
SDA (output)
ACK
STRT
STP
TXE
RXE
TBUSY
RBUSY
RBRDY
RTACK
(ACK transmission)
Shift register
shift
valid
RTDT[7:0]
Interrupt
Figure 20.5.8: I
S1C17001 TECHNICAL MANUAL
Transmission start
Slave address transmission
A6
A5
A4
A3
valid
shift
shift
shift
C timing chart 3 (Start condition ➔ Data receipt)
2
Interrupt occurred
Continuous data receipt
D7
D6
D5
shift
shift
shift
C timing chart 4 (Data receipt ➔ Stop condition)
2
A2
A1
A0
shift
shift
shift
A[6:0] + DIR
D4
D3
D2
Cleared by reading RTDT[7:0]
shift
shift
shift
D[7:0]
EPSON
ACK receipt
Receipt start
Data receipt
ACK
D7
DIR = 0
(ACK receipt)
shift
shift
Receipt end
ACK transmission
Stop condition
D1
D0
ACK
(ACK transmission)
shift
valid
D[7:0]
2
20 I
C
D6
shift
257
Advertisement
Table of Contents
