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Bit 7
Bit 6
Channel
IOB3
IOB2
3
0
0
1
1
0
1
Note:
*1 When bits TPSC2 to TPSC0 in TCR4 are set to B'000 and ø/1 is used as the TCNT4
count clock, this setting is invalid and input capture is not generated.
Bit 5
Bit 4
IOB1
IOB0 Description
0
0
TGR3B is Output disabled
output
1
compare
0
1
register
1
0
0
1
1
0
1
0
0
TGR3B is
input
1
capture
*
1
register
*
*
Initial output is 0
0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Output disabled
Initial output is 1
0 output at compare match
output
1 output at compare match
Toggle output at compare
match
Capture input
Input capture at rising edge
source is
Input capture at falling edge
TIOCB3 pin
Input capture at both edges
Capture input
Input capture at TCNT4
source is channel
count-up/count-down
4/count clock
(Initial value)
*1
*: Don't care
315
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