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assigned to a CS line according to
44.
Address MUX
A29
A0
A28
A1
A27
A2
A(29:19)
A26
A3
A20
A9
A19
32
64
5•6•1
SDRAM Programming
After power-up, SDRAM needs to be initialized by means of programming, to establish its mode of
operation. The SDRAM is programmed by issuing a Mode Register Set command. During that
command data is passed to the Mode Register through the SDRAM's address lines. This
command is fully supported by the SDRAM machine of the MSC8101.
Mode Register programming values are shown in
Programming"
below:
TABLE 5-4. 100 MHz SDRAM Mode Register Programming
SDRAM
SDRAM Mode Reg
a
Address Line
A10
Reserved
A9
WB
A8, A7
Operation Mode
A6 - A4
CAS Latency
A3
Burst Type
A2 - A0 (LSB)
Burst Length
a. Actually SDRAM's A0 is connected to MSC8101 A29/A28 address line (32/64 bit width mode)
MOTOROLA
Freescale Semiconductor, Inc.
Functional Description
TABLE 5-3. "MSC8101ADS Chip Select Assignments" on page
FIGURE 5-2 SDRAM Connection Scheme
CS2
CS
RAS
RAS
CAS
CAS
WE
W
BNK1
BA1
BNK0
BA0
A(0:9)
A(9:0)
PSDA10
A10
3.3
CKE
SYSCLK1
CLK
DQM(0:3)
DQM(0:3)
DQ(31:0)
D(0:31)
SDRAMEN64/32
DQM(4:7)
D(32:63)
Value
Field
'0'
'0'
'00'
b
3/2
'0'
'010'/'011'
MSC8101ADS RevB User's Manual
For More Information On This Product,
Go to: www.freescale.com
MT48LC2M32B2 x 2
SYSCLK2
TABLE 5-4. "100 MHz SDRAM Mode Register
Should program zero
Read & Write Burst Access
Standard Operation
CAS Latency
Sequential
c
4/8 Word Burst Length
CS
RAS
CAS
W
BA1
BA0
A(9:0)
A10
CKE
CLK
DQM(0:3)
DQ(31:0)
Meaning:
45
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