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Model
5315A/
B
Service
8-12
8-73.
Du ring charging,
current
flows
from
the 500 mA
and/
or the
10
mA regu lators
through
battery BTl,
fuse
Fl
,
and
current
sensing
resistor R18.
Th
e voltage
developed
across
this network
is
monitored by the
charge comparator,
made up of
cascaded
comparators
U2B
and
U2C,
temperature
compensating
thermisto
r
RTl
and
associated
circu itry
through R16 and CR6.
The charge level on
U2 pin 6 is
compared
against
the
reference
voltage
on
pi
n
5,
from
the 2.5V
reference reg
ulator
U3. The
output
of the
charge
com
pa
rator,
responding
to
the
charge require-
ments of the battery,
tu
rn
s
regulator
U2
on
and
off
via
CR10 and CR9. During
ac
operation, U2
(C)
is di sabled
by
the
+5V
suppl
y from
the motherboard,
via
CR3. CR2 and
CR4
form a diode
OR-gate,
supp lying voltage
from either
the unreg ulated
dc
(line)
or the
battery,
to 2.5V refer-
ence regulator
U3.
8-74. The low
battery
detector, consisting of
USA, USB, Q14.
a
nd
associated
circuitry,
monitors
the
switched
battery
voltage
during
discharge. When the battery
voltage
at pin 6 drops below the
reference leve
l
set at pin 5,
U5
pin
7
goes
high,
which disabl
es the
DC-Io-DC
converter
(U1 pin
2),
and
the +3
and
+5
regulators (on the motherboard
)
via
the shut-down line.
This enables
the low
battery
oscillator,
U4B and associated
circuitry,
which
blinks the discharge light
th ro
ugh
U4D and
Q8. When
the battery voltage
at pin 6
is
above the
reference,
US
pin
7
goes
low,
which
turns
on
the discha rge
light
conti nuously,
through
U4C,
U4A,
U4D,
and
08.
07,
CR3,
and
associated
circuitry
are support circuitry for
USB.
U1
and 05 make up
the
DC-to-DC,
which reverses the
polarity of the
positi
ve
battery
voltage,
to produce the
negative
dc necessary
to
drive the -5.2
regulator on the motherboard.
8-75. A7 TCXO Option 001
8-76.
The
A7
assembly provides a high
stability
time
base
oscillator,
which replaces
the internal
10
MHz reference
via
[NT/
EXT
switch
53.
Power
(+5V)
is
fed th rough
Pl pin 4 to pin
1
of
the
temperature
compensated crystal
oscillator
(TCXO).
10
MHz is
ouput,
across
divider network
Rl
and
R2,
to
Pl
pin 2.
8-77.
TROUBLESHOOTING TEST PROCEDURES
8-78. The following test procedures are designed
to effective ly verify
the
proper
operation of
isolated
subsections of the
counter.
Refer
to the
troubleshooting
block
di
agram,
Figure 8-6,
to
determine
the circuits
tested
by each procedure. Although
each
procedure
may
be performed
independently,
it
is
recommended
that they be
performed in the
numerical
sequence
as given.
8-79.
Test Procedure 1, Power Supply
8-80. To
verify the
proper
operation
of the
5315A/
B
power
supply, measure
the three dc
voh-
ages
on
the
labeled test points on the
Al
Motherboard. Insure
all
three
are
within the
±10 mV
tolerance. readjusting
if
necessary.
Voltage
+5V
dc
+
3V
dc
-
5.2V
dc
Tolerance
±10
mV
±10 mV
±10
mV
Adjustment
A1R19
A1R15
A1
R26
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