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1 OVERVIEW
TQFP12-48PIN
Port function
or signal
assignment
Pin name
#RESET
#RESET
V
DD
OSC1
OSC2
P54/EXOSC
P55/EXCL00
P56/EXCL01
P31/EXCL10/UPMUX
P32/EXCL11/UPMUX
SWCLK/PD0
SWD/PD1
TEST
Figure 1.3.1.2 S1C31D41 Pin Configuration Diagram (TQFP12-48PIN)
1-6
37
38
V
DD
39
OSC1
40
OSC2
P54
41
P55
42
P56
43
P31
44
45
P32
46
PD0
47
PD1
TEST
48
Seiko Epson Corporation
24
P43
P43/RTC1S
23
P42
P42/#ADTRG0
22
P17
P17/UPMUX/VREFA0
21
P16
P16/UPMUX/ADIN00
20
P15
P15/UPMUX/ADIN01
19
P14
P14/UPMUX/ADIN02
18
P13
P13/FOUT/UPMUX/ADIN03
17
P12
P12/UPMUX/ADIN04
16
P06
P06/SDACOUT_N2/UPMUX
15
P05
P05/SDACOUT_N/UPMUX
14
P04
P04/SDACOUT_P/UPMUX
13
P03
P03/SDACOUT_P2/UPMUX
S1C31D41 TECHNICAL MANUAL
(Rev. 1.1)
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