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Section 6
Block Diagram
IF
IF IN
DOWN CONVERTER
+10V
IF OUT
(LOOP THROUGH)
STREAM
EXT IN1
STREAM
EXT IN2
DC IN
AC IN
WLL-RX50
MDM-11
BOARD
TU1(TU601)
370MHz
IF
IC102
IC108
4.5MHz
FL101
IF
TUNER
AMP
LPF
AGC
+10V
CN101
Q601,602
+10V
XSHDN
IC401
IC402
CN401
S/P
EQ
CONV
27MHz CLK
IC431
IC432
CN431
S/P
EQ
CONV
IC611
DC-DC
IC612
DC-DC
IC1002-1004
+10V
4
+5V
RY1001
Q1022
DC-DC
+3.3V
1
CONV
+2.5V
-6V
+12V
SW
REG
Q1003
POWER
DET
CN1003
POWER
Overall
Overall
X102
27MHz CLK
XTAL OSC
27MHz
IC206,209
IC460
SRAM
FPGA
* TS:TRANSPORT STREAM
IC110
DC
IC109
CAFE TS OUT
TS SEL
OFFSET
*
IF DATA
OFDM
TS
AMP
DEMOD
X103
IC113
AGC ERROR
XTAL
AFC
CONFIG
VCO
CAFE S BIAS
AFC REF
18.285714MHz
HOST INTERFACE
IC503
IC603-608
IIC
3.3V
X502
IC504
XTAL
2
OSC
18MHz
IC510
IC506
IC701
HOST
+5V
CPU
NV RAM
PROM
PIO 2
IC508,509
IC704
SRAM
DA
CONV
AFC REF
CAFE S BIAS
CN703
CN702
CN1
KY-540
BOARD
INT
INT
LCD
EXT1
EXT1
SYSTEM
ALARM
EXT2
EXT2
STREAM
STREAM
IN
OUT
6-1
6-1
27MHz CLK
Q480,482,484,
486,488
CN480
STREAM OUT 1
IC481
DRIVER
TRANSMITTER
CN481
STREAM OUT 2
DRIVER
Q481,483,485,
487,489
IC473
CONFIG
EPR CONNECTOR
PROM
(TO UPDATE PLD)
CONFIG
5V
IC609
IC601
ADDRESS
PIO 1
DECODER
(TO UPDATE ROM)
CN701
CN1
KY-539
BOARD
MENU
ENTER
RESET
Overall
LOT NO. 323-
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