Epson S1C31D50 Technical Manual page 91

Cmos 32-bit single chip
Hide thumbs Also See for S1C31D50:
Table of Contents

Advertisement

Register name
Bit
P0RCTL
15
(P0 Port Pull-up/down
14
Control Register)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
P0INTF
15–8 –
(P0 Port Interrupt
7
Flag Register)
6
5
4
3
2
1
0
P0INTCTL
15
(P0 Port Interrupt
14
Control Register)
13
12
11
10
9
8
7
6
5
4
3
2
1
0
P0CHATEN
15–8 –
(P0 Port Chattering
7
Filter Enable Register)
6
5
4
3
2
1
0
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
Bit name
Initial
P0PDPU7
0
P0PDPU6
0
P0PDPU5
0
P0PDPU4
0
P0PDPU3
0
P0PDPU2
0
P0PDPU1
0
P0PDPU0
0
P0REN7
0
P0REN6
0
P0REN5
0
P0REN4
0
P0REN3
0
P0REN2
0
P0REN1
0
P0REN0
0
0x00
P0IF7
0
P0IF6
0
P0IF5
0
P0IF4
0
P0IF3
0
P0IF2
0
P0IF1
0
P0IF0
0
P0EDGE7
0
P0EDGE6
0
P0EDGE5
0
P0EDGE4
0
P0EDGE3
0
P0EDGE2
0
P0EDGE1
0
P0EDGE0
0
P0IE7
0
P0IE6
0
P0IE5
0
P0IE4
0
P0IE3
0
P0IE2
0
P0IE1
0
P0IE0
0
0x00
P0CHATEN7
0
P0CHATEN6
0
P0CHATEN5
0
P0CHATEN4
0
P0CHATEN3
0
P0CHATEN2
0
P0CHATEN1
0
P0CHATEN0
0
Seiko Epson Corporation
Reset
R/W
Remarks
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
R
H0
R/W
Cleared by writing 1.
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
R
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
H0
R/W
7 I/O PORTS (PPORT)
48
64
80
100
pin
pin
pin
pin
7-13

Advertisement

Table of Contents
loading

This manual is also suitable for:

S1c31d51

Table of Contents