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0x0020 0600–0x0020 0614
Address
Register name
0x0020
UART3_1CLK
0600
(UART3 Ch.1 Clock
Control Register)
0x0020
UART3_1MOD
0602
(UART3 Ch.1 Mode
Register)
0x0020
UART3_1BR
0604
(UART3 Ch.1 Baud-
Rate Register)
0x0020
UART3_1CTL
0606
(UART3 Ch.1 Control
Register)
0x0020
UART3_1TXD
0608
(UART3 Ch.1 Trans-
mit Data Register)
0x0020
UART3_1RXD
060a
(UART3 Ch.1 Receive
Data Register)
0x0020
UART3_1INTF
060c
(UART3 Ch.1 Status
and Interrupt Flag
Register)
0x0020
UART3_1INTE
060e
(UART3 Ch.1
Interrupt Enable
Register)
S1C31D50/D51 TECHNICAL MANUAL
(Rev. 2.00)
APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Bit
Bit name
15–9 –
8
DBRUN
7–6 –
5–4 CLKDIV[1:0]
3–2 –
1–0 CLKSRC[1:0]
15–13 –
12
PECAR
11
CAREN
10
BRDIV
9
INVRX
8
INVTX
7
–
6
PUEN
5
OUTMD
4
IRMD
3
CHLN
2
PREN
1
PRMD
0
STPB
15–12 –
11–8 FMD[3:0]
7–0 BRT[7:0]
15–8 –
7–2 –
1
SFTRST
0
MODEN
15–8 –
7–0 TXD[7:0]
15–8 –
7–0 RXD[7:0]
15–10 –
9
RBSY
8
TBSY
7
–
6
TENDIF
5
FEIF
4
PEIF
3
OEIF
2
RB2FIF
1
RB1FIF
0
TBEIF
15–8 –
7
–
6
TENDIE
5
FEIE
4
PEIE
3
OEIE
2
RB2FIE
1
RB1FIE
0
TBEIE
Seiko Epson Corporation
Initial
Reset
R/W
0x00
–
R
0
H0
R/W
0x0
–
R
0x0
H0
R/W
0x0
–
R
0x0
H0
R/W
0x00
–
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
–
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0x0
–
R
0x0
H0
R/W
0x00
H0
R/W
0x00
–
R
0x00
–
R
0
H0
R/W
0
H0
R/W
0x00
–
R
0x00
H0
R/W
0x00
–
R
0x00
H0
R
0x00
–
R
0
H0/S0
R
0
H0/S0
R
0
–
R
0
H0/S0
R/W
0
H0/S0
R/W
0
H0/S0
R/W
0
H0/S0
R/W
0
H0/S0
R
0
H0/S0
R
1
H0/S0
R
0x00
–
R
0
–
R
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
0
H0
R/W
UART (UART3) Ch.1
Remarks
–
–
–
–
–
–
–
Cleared by writing 1.
Cleared by writing 1 or read-
ing the UART3_1RXD register.
Cleared by writing 1.
Cleared by reading the
UART3_1RXD register.
Cleared by writing to the
UART3_1TXD register.
–
AP-A-41
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