Motorola MVME2400 Series Installation And Use Manual page 113
Vme processor module
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Also See for MVME2400 Series:
- Programmer's reference manual (331 pages) ,
- Installation and user manual (20 pages)
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Preparation and Installation
appropriate values. The default value varies according to the system's
bus clock speed (see note below).
Note
ROM Next Access Length (0 - 15) = 0?
The value programmed into the "ROMNAL" field (Memory Control
Configuration Register 8: bits 28-31) to represent wait states in access
time for nibble (or burst) mode ROM accesses. The lowest allowable
ROMNAL setting is $0; the highest allowable is $F. The value to enter
depends on processor speed; refer to
and Installation
The default value varies according to the system's bus clock speed.
Note
DRAM Parity Enable [On-Detection/Always/Never - O/A/N] = O?
Note
http://www.motorola.com/computer/literature
ROM First Access Length is not applicable to the MVME2400.
The configured value is ignored by PPCBug.
or
Appendix A, Specifications
ROM Next Access Length is not applicable to the MVME2400.
The configured value is ignored by PPCBug.
DRAM parity is enabled upon detection. (Default)
O
DRAM parity is always enabled.
A
N
DRAM parity is never enabled.
This parameter (above) also applies to enabling ECC for DRAM.
ENV – Set Environment
or
Appendix A, Specifications
Chapter 1, Hardware Preparation
for appropriate values.
for
6
6-11
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