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DRc[4–0]
0x00
Configuration/status register
0x01–0x05
Reserved
0x06
Address attribute trigger register
0x07
Trigger definition register
0x08
Program counter breakpoint register
0x09
Program counter breakpoint mask register
0x0A–0x0B Reserved
0x0C
Address breakpoint high register
0x0D
Address breakpoint low register
0x0E
Data breakpoint register
0x0F
Data breakpoint mask register
Debug control registers can be written by the external
development system or the CPU through the WDEBUG
instruction.
CSR is write-only from the programming model. It can be read
or written through the BDM port using the
WDMREG
29.4.1 Revision A Shared Debug Resources
In the Revision A implementation of the debug module, certain hardware structures are
shared between BDM and breakpoint functionality as shown in Table 29-4.
Table 29-4. Rev. A Shared BDM/Breakpoint Hardware
Register
AATR
Bus attributes for all memory commands
ABHR
Address for all memory commands
DBR
Data for all BDM write commands
Thus, loading a register to perform a specific function that shares hardware resources is
destructive to the shared function. For example, a BDM command to access memory
overwrites an address breakpoint in ABHR. A BDM write command overwrites the data
breakpoint in DBR.
MOTOROLA
Table 29-3. BDM/Breakpoint Registers
Register Name
NOTE:
commands.
BDM Function
Chapter 29. Debug Support
Abbreviation
Initial State
CSR
0x00010_0000
—
—
AATR
0x0000_0005
TDR
0x0000_0000
PBR
—
PBMR
—
—
—
ABHR
—
ABLR
—
DBR
—
DBMR
—
RDMREG
Breakpoint Function
Attributes for address breakpoint
Address for address breakpoint
Data for data breakpoint
Programming Model
Page
p. 29-10
—
p. 29-8
p. 29-14
p. 29-13
p. 29-13
—
p. 29-9
p. 29-9
p. 29-12
p. 29-12
and
29-7
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