Sony HAP-S1 Service Manual page 98

Hdd audio player system
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HAP-S1
Pin No.
Pin Name
E1
GXB_RX1p
E2
GXB_RX1n
E3
GND_E3
E4
VCCINT_E4
E5
GND_E5
CLK10/DIFFCLK_4n/
E6
REFCLK1n
CLK11/DIFFCLK_4p/
E7
REFCLK1p
E8
VCCINT_E8
E9
GND_E9
IO/DIFFIO_R4P/
E10
DM0R
E11
VCCIO6_E11
E12
GND_E12
E13
IO/VREFB6N0
F1, F2
GND_F1, GND_F2
F3
VCCL_GXB_F3
F4
GND_F4
F5
VCCINT_F5
F6
GND_F6
F7
VCCINT_F7
F8
GND_F8
F9
IO_F9
IO/DIFFIO_R5P/
F10
DQ0R
IO/DIFFIO_R5N/
F11
DQ0R
F12
CLK7/DIFFCLK_3P
F13
CLK6/DIFFCLK_3N
G1
GXB_TX0n
G2
GXB_TX0p
G3
VCCH_GXB
G4
VCCINT_G4
G5
GND_G5
G6
VCCINT_G6
G7
GND_G7
G8
VCCINT_G8
IO/DIFFIO_R6P/
G9
DQS0R/CQ0R/
DPCLK8
IO/DIFFIO_R6N/
G10
DEV_OE
G11
VCCIO6_G11
G12
GND_G12
G13
CLK4/DIFFCLK_2N
H1, H2
GND_H1, GND_H2
H3
VCCL_GXB_H3
H4
GND_H4
H5
VCCINT_H5
H6
GND_H6
H7
VCCINT_H7
H8
GND_H8
H9
VCCA_H9
IO/DIQS1R/CQ0R#/
H10
DPCLK7
H11
VCCIO5_H11
H12
IO/VREFB5N0
H13
CLK5/DIFFCLK_2P
J1
GXB_RX0n
J2
GXB_RX0P
98
I/O
O
Not used
O
Not used
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
I
Reset signal input from the MPU
I
50 MHz clock signal input terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
O
Serial data transfer clock signal output to the D/A converter
-
Power supply terminal (+3.3V)
-
Ground terminal
O
Not used
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
O
Chip select signal output to the audio DSP
I
Serial data input from the audio DSP
O
Serial data output to the audio DSP
I
Interrupt signal input from the audio DSP
I
Busy signal input from the audio DSP
O
Receive data (negative) output to the FPGA
O
Receive data (positive) output to the FPGA
-
Power supply terminal (+2.5V)
-
Power supply terminal (+1.2V)
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
-
Power supply terminal (+1.2V)
O
Serial data transfer clock signal output to the audio DSP
O
Reset signal output to the audio DSP
-
Power supply terminal (+3.3V)
-
Ground terminal
I
5.6448 MHz clock or 6.144 MHz clock signal input terminal
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
-
Power supply terminal (+1.2V)
-
Ground terminal
-
Power supply terminal (+2.5V)
O
Power on/off control signal output terminal for the 22.5792 MHz clock
-
Power supply terminal (+3.3V)
O
Power on/off control signal output terminal for the 24.576 MHz clock
I
Not used
I
Transmit data (negative) input from the MPU
I
Transmit data (positive) input from the MPU
Description
"L": reset
"L": reset
"H": power on
"H": power on

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