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Wait 1-5
,
Status Register (SR) 1-8
4-10
bit definitions 4-10
Condition Code Register (CCR) 4-10
Carry (C) 4-14
Extension (E) 4-14
Limit (L) 4-14
Negative (N) 4-14
Overflow (V) 4-14
Scaling (S) 4-13
Unnormalized (U) 4-14
Zero (Z) 4-14
Extended Mode Register (EMR) 4-10
Arithmetic Saturation Mode (SM) 4-10
Cache Enable (CE) 4-11
Core Priority (CP) 4-10
DO FOREVER (FV) Flag 4-11
Instruction Cache Enable (CE) 4-10
Rounding Mode (RM) 4-10
Sixteen-Bit Arithmetic Mode (SA) 4-11
Mode Register (MR) 4-10
Do Loop Flag (LF) 4-11
Double-Precision Multiply Mode (DM) 4-12
Interrupt Mask (I) 4-13
Scaling (S) Mode 4-13
Sixteen-Bit Compatibility (SC) Mode 4-12
programming sheet B-12
status registers, reading 5-2
Stop Delay Mode (SD) bit 4-18
,
STOP instruction 6-22
8-6
Stop standby mode 1-5
Switch mode 1-5
switching memory configuration dynamically 3-5
switching memory sizes 3-2
,
Synchronous mode 7-10
7-11
Synchronous Serial Interface Status Register
,
(SSISR) 7-14
7-28
Receive Data Register Full (RDF) 7-28
Receiver Frame Sync Flag (RFS) 7-29
Receiver Overrun Error Flag (ROE) 7-28
Serial Input Flag 0 (IF0) 7-29
Serial Input Flag 1 (IF1) 7-29
Transmit Data Register Empty (TDE) 7-28
Transmit Frame Sync Flag (TFS) 7-29
Transmitter Underrun Error Flag (TUE) 7-28
Synchronous/Asynchronous (SYN) bit 7-21
T
TA Synchronize Select (TAS) bit 4-17
Test Access Port (TAP) 1-5
Time Slot Register (TSR) 7-33
,
timer 2-2
2-20
after Reset 9-3
Index-12
,
,
,
7-13
8-2
8-18
,
1-9
DSP56303 User's Manual
enabling 9-4
exception 9-4
Compare 9-4
Overflow 9-4
GPIO 5-9
initialization 9-3
operating modes 9-5
Capture (mode 6) 9-5
Event Counter (mode 3) 9-5
GPIO (mode 0) 9-5
Input Period (mode 5) 9-5
Input Width (mode 4) 9-5
overview 9-6
Pulse (mode 1) 9-5
Pulse Width Modulation (PWM) (mode 7) 9-5
,
9-14
9-19
reserved 9-25
setting 9-4
signal measurement modes 9-14
Toggle (mode 2) 9-5
watchdog modes 9-21
Watchdog Pulse (mode 9) 9-5
Watchdog Toggle (mode 10) 9-5
prescaler counter 9-25
programming model 9-25
special cases 9-25
timer compare interrupts 9-32
Timer Compare Register (TCPR) 9-34
Timer Control/Status Register (TCSR) 9-28
Data Input (DI) 9-29
Data Output (DO) 9-29
Direction (DIR) 9-30
Inverter (INV) 9-30
Prescaler Clock Enable (PCE) 9-29
Timer Compare Flag (TCF) 9-29
Timer Compare Interrupt Enable (TCIE) 9-32
Timer Control (TC) 9-31
Timer Enable (TE) 9-32
Timer Overflow Flag (TOF) 9-29
Timer Overflow Interrupt Enable (TOIE) 9-32
Timer Reload Mode (TRM) 9-30
Timer Count Register (TCR) 9-34
Timer Load Registers (TLR) 9-33
Timer Prescaler Count Register (TPCR) 9-28
Prescaler Counter Value (PC) 9-28
Timer Prescaler Load Register (TPLR) 9-27
bit definitions 9-27
Prescaler Preload Value (PL) 9-27
Prescaler Source (PS) 9-27
Timer Compare Flag (TCF) bit 9-29
Timer Compare Interrupt Enable (TCIE) bit 9-32
Timer Compare Register (TCPR) 9-4
Timer Control (TC) bits 9-31
Timer Control/Status Register (TCSR) 9-3
,
,
9-14
9-18
,
9-12
,
9-6
,
,
9-14
9-16
,
9-14
,
9-8
,
9-10
,
9-22
,
9-22
,
9-32
,
9-34
,
9-28
,
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