Asus AAEON GENE-BSW5 User Manual
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Asus AAEON GENE-BSW5 User Manual

3.5” subcompact board
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GENE-BSW5
3.5" Subcompact Board
User's Manual 4
th
Ed
Last Updated: May 23, 2017

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Summary of Contents for Asus AAEON GENE-BSW5

  • Page 1 GENE-BSW5 3.5” Subcompact Board User’s Manual 4 Last Updated: May 23, 2017...
  • Page 2 Copyright Notice This document is copyrighted, 2017. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp.  Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation  Core, Atom are trademarks of Intel Corporation ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity GENE-BSW5 subcompact board  Product DVD with User’s Manual (in pdf) and drivers  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii. Exposure to moisture Device is not working as expected or in a manner as described in this manual The device is dropped or damaged Any obvious signs of damage displayed on the device...
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Main Board/ Daughter Board/ Backplane 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Main Board/ Daughter Board/ Backplane Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 2.1.1 Dimensions (Optional HDMI SKU)............8 Jumpers and Connectors ..................10 2.2.1 Jumpers and Connectors (Optional HDMI SKU) ........12 Block Diagram ......................14 List of Jumpers ......................
  • Page 12 2.5.8 LVDS2 Port (CN8) ................24 2.5.9 LVDS Port (CN9) ................26 2.5.10 Audio I/O Port (CN10) ..............27 2.5.11 COM Port 2 (CN11) ................ 28 2.5.12 LPT Port / 8 bit DIO (CN12) ............30 2.5.13 COM Port 3 (CN13) ................ 32 2.5.14 LPC Port (CN14) ................
  • Page 13 List of Mating Connectors and Cables .............. 53 Chapter 3 - AMI BIOS Setup ....................56 System Test and Initialization ................57 AMI BIOS Setup ..................... 58 Setup submenu: Main ..................59 Setup submenu: Advanced ................. 60 3.4.1 Advanced: CPU Configuration ..............62 3.4.2 Advanced: SATA Configuration ...........
  • Page 14 Appendix A - Watchdog Timer Programming ..............102 Watchdog Timer Registers ................103 Watchdog Sample Program ................104 Appendix B - I/O Information ..................... 107 I/O Address Map ....................108 Memory Address Map ..................109 IRQ Mapping Chart ....................110 Appendix C –...

  • Page 15: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 16: Specifications

    Specifications System 3.5” Form Factor  Intel ® Pentium ® N3160 SoC Processor  204-pin DDR3L 1600 SODIMM x 1, up to 8 GB System Memory  Intel Pentium N3160 SoC ® ® Chipset  Fintek F81866D-I I/O Chipset  Realtek RTL-8111E, 10/100/1000Base, RJ-45 Ethernet ...
  • Page 17 0 ~ 90% relative humidity, non condensing Operation Humidity  CE/FCC Certification  Display Chipset Intel ® Pentium ® N3160 SoC  HDMI Up to 2560 x 1600 @60 Hz, 3840 x 2160 Resolution  @30Hz LVDS up to 1920 x 1200@ 60 Hz VGA up to 2560 x 1600 @ 60 Hz LVDS x 2 + VGA Video Output...
  • Page 18 Touchscreen 4/5/8-wire resistive touchscreen (USB interface)  Chapter 1 – Product Specifications...

  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 20: Dimensions

    Dimensions Component Side Component Side Chapter 2 – Hardware Information...
  • Page 21 Solder Side Solder Side Chapter 2 – Hardware Information...

  • Page 22: Dimensions (Optional Hdmi Sku)

    2.1.1 Dimensions (Optional HDMI SKU) Component Side Component Side Chapter 2 – Hardware Information...
  • Page 23 Solder Side Solder Side Chapter 2 – Hardware Information...

  • Page 24: Jumpers And Connectors

    Jumpers and Connectors Component Side Component Side Chapter 2 – Hardware Information...
  • Page 25 Solder Side Solder Side Chapter 2 – Hardware Information...

  • Page 26: Jumpers And Connectors (Optional Hdmi Sku)

    2.2.1 Jumpers and Connectors (Optional HDMI SKU) Component Side Component Side Chapter 2 – Hardware Information...
  • Page 27 Solder Side Solder Side Chapter 2 – Hardware Information...

  • Page 28: Block Diagram

    Block Diagram Chapter 2 – Hardware Information...

  • Page 29: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Front Panel Connector COM3 Pin8 Function Selection LVDS Port Backlight Inverter VCC Selection LVDS Port Operating VDD Selection COM2 Pin8 Function Selection LVDS Port Backlight Lightness Control Mode Selection JP11...

  • Page 30: Front Panel Connector (Jp1)

    2.4.1 Front Panel Connector (JP1) Pin Name Pin Name PWR_BTN- PWR_BTN+ HDD_LED- HDD_LED+ SPEAKER- SPEAKER+ PWR_LED- PWR_LED+ H/W RESET- H/W RESET+ 2.4.2 COM3 Function Selection (JP2) +12V Ring (default) 2.4.3 LVDS Port Backlight Inverter VCC Selection (JP3) +5V (default) +12V LVDS (2-4) LVDS (4-6) LVDS2 (1-3)

  • Page 31: Lvds Port Operating Vdd Selection (Jp4)

    2.4.4 LVDS Port Operating VDD Selection (JP4) +3.3V (default) LVDS (2-4) LVDS (4-6) LVDS2 (1-3) LVDS2 (3-5) 2.4.5 COM2 Function Selection (JP5) +12V Ring (default) 2.4.6 LVDS Port Backlight Lightness Control Selection (JP6) BKLT_CTRL_VR (default) LVDS_BKLCTL_CON LVDS (2-4) LVDS (4-6) LVDS2 (1-3) LVDS2 (3-5) 2.4.7 Auto Power Button Enable/Disable Selection (JP12)

  • Page 32: Touchscreen 4/5/8-Wire Selection (Jp14)

    2.4.8 Touchscreen 4/5/8-wire Selection (JP14) 4/8 Wires Mode (default) 5 Wires Mode 2.4.9 Clear CMOS Jumper (JP15) 1 2 3 Normal (default) Clear CMOS Chapter 2 – Hardware Information...

  • Page 33: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function +5VSB Output w/SMBus +5V Output for SATA HDD LVDS Port Inverter / Backlight Connector PSON# Port 3.0 SATA Port External +12V Input LVDS2 Port Inverter / Backlight Connector...
  • Page 34 CN24 PS/2 Keyboard/Mouse Combo Port CN25 CPU FAN (Optional) CN26 LAN (RJ-45) Port1 CN27 LAN (RJ-45) Port2 CN28 USB Ports 0 and 1 CN29 COM Port 1 (D-SUB 9) CN30 HDMI Port CN31 Battery CN32 VGA Port CN33 MiniCard Slot (Half-MiniCard) CN34 DDR3L SO-DIMM Slot CN35...

  • Page 35: Vsb Output W/Smbus (Cn1)

    2.5.1 +5 VSB Output w/SMBus (CN1) SMB_DATA SMB_CLK PS_ON# +5VSB Pin Name Signal Type Signal level SMB_DATA +3.3V SMB_CLK +3.3V PS_ON# +3.3V +5VSB 2.5.2 +5V Output for SATA HDD (CN2) Pin Name Signal Type Signal Level Chapter 2 – Hardware Information...

  • Page 36: Lvds Port Inverter / Backlight Connector (Cn3)

    2.5.3 LVDS Port Inverter / Backlight Connector (CN3) Pin Name Signal Type Signal Level BKL_PWR +5V / +12V BKL_CONTROL BKL_ENABLE +3.3V * LVDS BKL_PWR can be set to +5V or +12V by JP3. * LVDS BKL_CONTROL can be set by JP6. 2.5.4 External +5VSB Inout (CN4) PS_ON# +5VSB...

  • Page 37: Sata Port 1 (Cn5)

    2.5.5 SATA Port 1 (CN5) Pin Name Signal Type Signal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF 2.5.6 External +12V Input (CN6) Pin Name Signal Type Signal Level +12V +12V Chapter 2 – Hardware Information...

  • Page 38: Lvds2 Port Inverter / Backlight Connector (Cn7)

    2.5.7 LVDS2 Port Inverter / Backlight Connector (CN7) Pin Name Signal Type Signal Level BKL_PWR +5V / +12V BKL_CONTROL BKL_ENABLE +3.3V * LVDS BKL_PWR can be set to +5V or +12V by JP3. * LVDS BKL_CONTROL can be set by JP6. 2.5.8 LVDS2 Port (CN8) PIN 29 PIN 30...
  • Page 39 LCD_PWR +3.3V/+5V LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA0+ DIFF LVDS_DA1- DIFF LVDS_DA1+ DIFF LVDS_DA2- DIFF LVDS_DA2+ DIFF LVDS_DA3- DIFF LVDS_DA3+ DIFF DDC_DATA +3.3V DDC_CLK +3.3V LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF LVDS_DB1+ DIFF LVDS_DB2- DIFF LVDS_DB2+ DIFF LVDS_DB3- DIFF LVDS_DB3+...

  • Page 40: Lvds Port (Cn9)

    2.5.9 LVDS Port (CN9) PIN 29 PIN 30 PIN 1 PIN 2 * LVDS LCD_PWR can be set to +3.3V or +5V by JP4. Pin Name Signal Type Signal level BKL_ENABLE BKL_CONTROL LCD_PWR +3.3V/+5V LVDS_A_CLK- DIFF LVDS_A_CLK+ DIFF LCD_PWR +3.3V/+5V LVDS_DA0- DIFF LVDS_DA0+...

  • Page 41: Audio I/O Port (Cn10)

    Pin Name Signal Type Signal level DDC_CLK +3.3V LVDS_DB0- DIFF LVDS_DB0+ DIFF LVDS_DB1- DIFF LVDS_DB1+ DIFF LVDS_DB2- DIFF LVDS_DB2+ DIFF LVDS_DB3- DIFF LVDS_DB3+ DIFF LCD_PWR +3.3V/+5V LVDS_B_CLK- DIFF LVDS_B_CLK+ DIFF 2.5.10 Audio I/O Port (CN10) Pin Name Signal Type Signal Level MIC_L MIC_R GND_AUDIO...

  • Page 42: Com Port 2 (Cn11)

    GND_AUDIO LEFT_OUT GND_AUDIO RIGHT_OUT +5V_AUDIO 2.5.11 COM Port 2 (CN11) RS-232 Pin Name Signal Type Signal Level ±9V ±9V ±9V RI/+5V/+12V IN/ PWR +5V/+12V Chapter 2 – Hardware Information...
  • Page 43 RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V RS-485 Pin Name Signal Type Signal Level RS485_D- ±5V Chapter 2 – Hardware Information...

  • Page 44: Lpt Port / 8 Bit Dio (Cn12)

    RS485_D+ ±5V NC/+5V/+12V +5V/+12V * COM2 RS-232/422/485 can be set by BIOS setting. Default is RS-232. * Pin 8 function can be set by JP5. 2.5.12 LPT Port / 8 bit DIO (CN12) LPT Port Pin Name Signal Type Signal Level STROBE# AFD# ERROR#...
  • Page 45 ACK# BUSY SLCT 8-bit DI/O Pin Name Signal Type Signal Level GPIO0 Chapter 2 – Hardware Information...

  • Page 46: Com Port 3 (Cn13)

    GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 2.5.13 COM Port 3 (CN13) RS-232 Pin Name Signal Type Signal Level ±9V ±9V ±9V RI/+5V/+12V IN/ PWR +5V/+12V Chapter 2 – Hardware Information...
  • Page 47 RS-422 Pin Name Signal Type Signal Level RS422_TX- ±5V RS422_TX+ ±5V RS422_RX+ RS422_RX- NC/+5V/+12V +5V/+12V RS-485 Pin Name Signal Type Signal Level RS485_D- ±5V Chapter 2 – Hardware Information...

  • Page 48: Lpc Port (Cn14)

    RS485_D+ ±5V NC/+5V/+12V +5V/+12V * COM2 RS-232/422/485 can be set by BIOS setting. Default is RS-232. * Pin 8 function can be set by JP5. 2.5.14 LPC Port (CN14) LAD0 LAD1 LAD2 LAD3 +3.3V LFRAME# LRESET# LCLK LDRQ0 LDRQ1 SERIRQ Pin Name Signal Type Signal Level...

  • Page 49: Com Port 6 (Cn15)

    LDRQ0 LDRQ1 SERIRQ +3.3V 2.5.15 COM Port 6 (CN15) Pin Name Signal Type Signal Level ±9V ±9V ±9V Chapter 2 – Hardware Information...

  • Page 50: Com Port 5 (Cn16)

    2.5.16 COM Port 5 (CN16) Pin Name Signal Type Signal Level ±9V ±9V ±9V 2.5.17 COM Port 4 (CN17) Chapter 2 – Hardware Information...

  • Page 51: Usb 2.0 Port 3 (Cn19)

    Pin Name Signal Type Signal Level ±9V ±9V ±9V 2.5.18 USB 2.0 Port 3 (CN19) Pin Name Signal Type Signal Level +5VSB USB3_D- DIFF USB3_D+ DIFF 2.5.19 USB 2.0 Port 2 (CN20) +5VSB USB2_D- USB2_D+ Chapter 2 – Hardware Information...
  • Page 52 Pin Name Signal Type Signal Level +5VSB USB2_D- DIFF USB2_D+ DIFF Chapter 2 – Hardware Information...

  • Page 53: Usb 2.0 Port 4 (Cn21)

    2.5.20 USB 2.0 Port 4 (CN21) +5VSB USB2_D- USB2_D+ Pin Name Signal Type Signal Level +5VSB USB4_D- DIFF USB4_D+ DIFF G ND 2.5.21 COM Port 1 (CN22) RI/+5V/+12V RS-232 Pin Name Signal Type Signal Level ±5V ±5V Chapter 2 – Hardware Information...

  • Page 54: Touchscreen Connector (Cn23)

    ±5V RI/+5V/+12V IN/ PWR +5V/+12V * COM1 RS-232/422/485 can be set by BIOS setting. Default is RS-232. 2.5.22 Touchscreen Connector (CN23) 4 Wire Pin Name Signal Type Signal Level BOTTOM LEFT RIGHT Chapter 2 – Hardware Information...
  • Page 55 5 Wire Pin Name Signal Type Signal Level UL(Y) UR(H) LL(L) LR(X) SENSE(S) 8 Wires 4 Wires TOP EXCITE BOTTOM EXCITE BOTTOM LEFT LL(L LEFT EXCITE RIGHT EXCITE RIGHT TOP SENSE SENS BOTTOM SENSE LEFT SENSE RIGHT SENSE 8 Wire Pin Name Signal Type Signal Level...

  • Page 56: Ps/2 Keyboard/Mouse Combo Port (Cn24)

    TOP EXCITE BOTTOM EXCITE LEFT EXCITE RIGHT EXCITE TOP SENSE BOTTOM SENSE LEFT SENSE RIGHT SENSE * Touch mode can be set by JP14 2.5.23 PS/2 Keyboard/Mouse Combo Port (CN24) Pin Name Signal Type Signal Level KB_ DATA KB_CLK +5VSB MS_DATA MS_CLK Chapter 2 –...

  • Page 57: Cpu Fan (Cn25)

    2.5.24 CPU Fan (CN25) Pin Name Signal Type Signal Level FAN_POWER +12V FAN_TAC 2.5.25 LAN (RJ-45) Port1 (CN26) ACT/LINK SPEED Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF Chapter 2 –...

  • Page 58: Lan (Rj-45) Port2 (Cn27)

    2.5.26 LAN (RJ-45) Port2 (CN27) ACT/LINK SPEED Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- DIFF 2.5.27 USB Ports 0 and 1 (CN28) Pin Name Signal Type Signal Level +5VSB USB0_D-...

  • Page 59: Com Port 1 (D-Sub 9) (Cn29)

    USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB USB1_D- DIFF USB1_D+ DIFF USB1_SSRX− USB1_SSRX+ USB1_SSTX− USB1_SSTX+ 2.5.28 COM Port 1 (D-SUB 9) (CN29) * COM port1 can be selected for D-SUB9 or Wafer BOX connector (CN22) Pin Name Signal Type Signal Level ±9V ±9V ±9V...

  • Page 60: Hdmi Port (Cn30)

    2.5.29 HDMI Port (CN30) Pin Name Signal Type Signal Level TMDS_DAT2+ DIFF TMDS_DAT2- DIFF TMDS_DAT1+ DIFF TMDS_DAT1- DIFF TMDS_DAT0+ DIFF TMDS_DAT0- DIFF TMDS_CLK+ DIFF TMDS_CLK- DIFF DDC_CLK DDC_DATA HPLG_DETECT Chapter 2 – Hardware Information...

  • Page 61: Battery (Cn31)

    2.5.30 Battery (CN31) Pin Name Signal Type Signal Level +3.3V 3.3V 2.5.31 VGA Port (CN32) Pin Name Signal Type Signal Level GREEN BLUE RED_GND_RTN GREEN_GND_RTN BLUE_GND_RTN CRT_PLUG# DDC_DATA HSYNC VSYNC DDC_CLK Chapter 2 – Hardware Information...

  • Page 62: Minicard Slot (Half-Minicard) (Cn33)

    2.5.32 MiniCard Slot (Half-MiniCard) (CN33) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# PCIE_REF_CLK- DIFF PCIE_REF_CLK+ DIFF W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V Chapter 2 – Hardware Information...
  • Page 63 PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V Chapter 2 – Hardware Information...

  • Page 64: Ddr3L So-Dimm (Cn34)

    +3.3VSB +3.3V 2.5.33 DDR3L SO-DIMM (CN34) Standard Specification 2.5.34 UIM Card Socket (CN35) Pin Name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA 2.5.35 MiniCard Slot (Full-MiniCard) (CN36) Pin Name Signal Type Signal Level PCIE_WAKE# +3.3VSB +3.3V +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR Chapter 2 –...
  • Page 65 UIM_DATA PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF Chapter 2 – Hardware Information...
  • Page 66 USB_D+ DIFF +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V Chapter 2 – Hardware Information...

  • Page 67: List Of Mating Connectors And Cables

    List of Mating Connectors and Cables Mating Connector Connector Available Function Cable P/N Label Cable Vendor Model No. External AUX Power and PHR-6 PS_ON# 2 Pins For +5Vout PHR-2 SATA HDD 1702150155 Connector Power LVDS Inverter PHR-5 Connector External +5VSB Power Input and XHP-3 ATX Cable...
  • Page 68 Cable COM Port #4 Serial Port CN13 Molex 51021-0900 1701090150 Connector Cable AAEON LPC CN14 LPC Connector SHR-12V-S-B 1703120130 Cable COM Port #3 Serial Port CN15 Molex 51021-0900 1701090150 Connector Cable COM Port #4 Serial Port CN16 Molex 51021-0900 1701090150 Connector Cable COM Port #3...
  • Page 69 Chapter 2 – Hardware Information...

  • Page 70: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 71: System Test And Initialization

    System Test and Initialization The board uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.

  • Page 72: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...

  • Page 73: Setup Submenu: Main

    Setup submenu: Main Press ‘Delete’ Key to enter Setup Options summary: (default setting) System Date Day MM:DD:YYYY Change the month, year and century. The ‘Day’ is changed automatically. System Time HH : MM : SS Change the clock of the system. Chapter 3 –...

  • Page 74: Setup Submenu: Advanced

    Setup submenu: Advanced Options summary: (default setting) CPU Configuration CPU Configuration Parameters SATA Configuration SATA Device Options Settings USB Configuration USB Configuration Parameters Hardware Monitor Monitor hardware status SIO Configuration Super IO Configuration Parameters Chapter 3 – AMI BIOS Setup...
  • Page 75 CSM Configuration CSM Enable/Disable, Option ROM execution setting. Power Management System ACPI/Power Mode/Wake Event Configuration Digital IO Port Configuration DIO configuration Chapter 3 – AMI BIOS Setup...

  • Page 76: Advanced: Cpu Configuration

    3.4.1 Advanced: CPU Configuration Options summary: (default setting) EIST Enabled Disabled Enable/Disable Intel SpeedStep feature. Turbo Mode Enabled Disabled En/Disable Turbo mode. Intel Virtualization Enabled Technology Disabled When enabled, a VMM can utilize the additional hardware capabilities provide by Vanderpool Technology Chapter 3 –...
  • Page 77 CPU C State Report Enabled Disabled Enable/Disable CPU C state report to OS Thermal Monitor (TM) Enabled Disabled Enable/Disable CPU Thermal Monitor Chapter 3 – AMI BIOS Setup...

  • Page 78: Advanced: Sata Configuration

    3.4.2 Advanced: SATA Configuration Options summary: (default setting) SATA Speed Support Gen3 Gen2 Gen1 SATA Speed Support Gen3, Gen2 or Gen1 SATA Mode AHCI Mode Only AHCI mode support on this platform SATA Port0/Port1 HotPlug Enabled Disabled Enabled/Disabled SATA Port0/Port1 HotPlug function Chapter 3 –...

  • Page 79: Advanced: Usb Configuration

    3.4.3 Advanced: USB Configuration Options summary: (default setting) XHCI Mode Enabled Disabled Enable/Disable for xHCI controller: Legacy USB Support Enabled Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected.

  • Page 80: Advanced: Hardware Monitor

    3.4.4 Advanced: Hardware Monitor Options summary: (default setting) Smart Fan Disabled Enabled En/Disable specified Smart Fan. Chapter 3 – AMI BIOS Setup...

  • Page 81: Hardware Monitor: Smart Fan Configuration

    3.4.4.1 Hardware Monitor: Smart Fan Configuration Options summary: (default setting) Fan Mode Manual Duty Auto Duty Smart Fan Mode Select Manual Duty Mode Manual mode fan control, user can write expected duty cycle (PWM fan type) 1 – 100 Temperature Source CPU(external) Select the monitored temperature source for this fan.
  • Page 82 Duty Cycle 3 Duty Cycle 4 Duty Cycle 5 Fan speed control for each temperature region. User can write expected duty cycle (PWM fan type) 1 – 100 Temperature 1 Temperature 2 Temperature 3 Temperature 4 Definition of temperature region. User can write expected temperature boundary 1 – Chapter 3 –...

  • Page 83: Advanced: Sio Configuration

    3.4.5 Advanced: SIO Configuration Options summary: (default setting) Parallel Port/Serial Port 1/2/3/4/5/6 Configuration Set Parameters of Serial Port 1/2/3/4/5/6 and Parallel Port Chapter 3 – AMI BIOS Setup...

  • Page 84: Sio Configuration: Serial Port 1-6 Configuration

    3.4.5.1 SIO Configuration: Serial Port 1-6 Configuration Options summary: (default setting) Use This Device Disabled Enabled En/Disable specified serial port. Change Settings Use Automatic Settings (COM1) IO=3F8h; IRQ=4; IO=2F8h; IRQ=3; Change Settings Use Automatic Settings (COM2) IO=2F8h; IRQ=3; IO=3F8h; IRQ=4; Change Settings Use Automatic Settings Chapter 3 –...
  • Page 85 (COM3) IO=3E8h; IRQ=11; IO=2E8h; IRQ=11; Change Settings Use Automatic Settings (COM4) IO=2E8h; IRQ=11; IO=3E8h; IRQ=11; Change Settings Use Automatic Settings (COM5) IO=2D0h; IRQ=11; IO=2C0h; IRQ=11; Change Settings Use Automatic Settings (COM6) IO=2C0h; IRQ=11; IO=2D0h; IRQ=11; Select a resource setting for Super IO device. Mode RS232 RS422...

  • Page 86: Sio Configuration: Parallel Port Configuration

    3.4.5.2 SIO Configuration: Parallel Port Configuration Options summary: (default setting) Use This Device Disabled Enabled En/Disable specified this Logical Device Note: LPT and DIO feature share the same interface on the board. When LPT disabled, the interface works in DIO mode and vice versa. Possible Use Automatic Settings STD Printer...
  • Page 87 IO=378h; IO=778h; IRQ=5; DMA=3; ECP and EPP IO=378h; IO=778h; IRQ=5,6,7,9,10,11,12; DMA=1,3; IO=278h; IO=678h; IRQ=5,6,7,9,10,11,12; DMA=1,3; IO=3BCh; IO=7BCh; IRQ=5,6,7,9,10,11,12; DMA=1,3; Select a resource setting for Super IO device. Mode STD Print Mode SPP Mode EPP-1.9 and SPP Mode EPP-1.7 and SPP Mode ECP Mode ECP and EPP 1.9 Mode ECP and EPP 1.7 Mode...

  • Page 88: Advanced: Csm Configuration

    3.4.6 Advanced: CSM Configuration Options summary: (default setting) CSM Support Enabled Disabled Enable/Disable for CSM Support Boot option filter UEFI and Legacy Legacy only UEFI only This option controls Legacy/UEFI boot option priority Network/PXE Do not launch UEFI Chapter 3 – AMI BIOS Setup...
  • Page 89 Legacy Controls the execution of UEFI and Legacy PXE OpROM Storage Do not launch UEFI Legacy Controls the execution of UEFI and Legacy Storage OpROM Video Do not launch UEFI Legacy Controls the execution of UEFI and Legacy Video OpROM Chapter 3 –...

  • Page 90: Advanced: Power Management

    3.4.7 Advanced: Power Management Options summary: (default setting) ATX Type Power Mode AT Type Select system power mode Enabled Power Saving (ERP) Control Disabled Enabled or disabled ERP feature for power saving in S5 state. Power Off Restore AC Power Loss Power on Late State Select AC power state when power is re-applied after a power failure...
  • Page 91 Enabled RI Wake Event Disabled Enabled or disabled wake on ring function. RTC wake system from S5 Disabled Fixed Time Dynamic Time Enable system to wake from S5 using RTC alarm. Wake up day 0-31 Select 0 for daily system wake up 1-31 for which day of the month that you would like the system to wake up Wake up hour 0-23...

  • Page 92: Advanced: Digital Io Port Configuration

    3.4.8 Advanced: Digital IO Port Configuration Options summary: (default setting) DIO Port1/2/3/4 Input Output Set DIO Port1/2/3/4 as Input or Output DIO Port5/6/7/8 Input Output Set GPIO3/GPIO4 as Input or Output Output Level Set GPIO Level when used as Output Chapter 3 –...

  • Page 93: Setup Submenu: Chipset

    Setup submenu: Chipset Options summary: (default setting) North Bridge Configuration North Bridge Parameters. South Bridge South Bridge Parameters Chapter 3 – AMI BIOS Setup...

  • Page 94: Chipset: North Bridge Configuration

    3.5.1 Chipset: North Bridge Configuration Options summary: (default setting) Primary Boot Display Auto LVDS1 LVDS2/HDMI Select Primary boot display device Secondary Boot Display Disabled LVDS1 LVDS2/HDMI Select Primary boot display device Chapter 3 – AMI BIOS Setup...
  • Page 95 DVMT Pre-Allocated 32MB 32MB~512MB Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory size used by the Internal Graphics Device. DVMT Total Gfx Mem 128MB 256MB Select DVMT 5.0 Total Graphic Memory size used by the IGD. LVDS Panel Configuration Config LVDS panel parameters. Chapter 3 –...

  • Page 96: North Bridge: Lvds Panel Configuration

    3.5.1.1 North Bridge: LVDS Panel Configuration Options summary: (default setting) LVDS Disabled Enabled LVDS2 Disabled Enabled Enable or Disable LVDS interface Panel Type 640x480 800x480 800x600 1024x600 1024x768 Chapter 3 – AMI BIOS Setup...
  • Page 97 1280x768 1280x1024 1366x768 1440x900 1600x1200 1920x1080 1920x1200 Select panel resolution. Color Depth 18-Bit 24-Bit 36-Bit 48-Bit Select color depth of the panel Backlight Type Inverted Normal Select Backlight control type. Inverted: Brightest for low PWM duty cycle and low voltage. Normal: Brightest for high PWM duty cycle and high voltage.
  • Page 98 Select Backlight Level Backlight PWM Freq 100Hz 200Hz 220Hz 500Hz 1KHz 2.2KHz 6.5KHz Select PWM frequency of backlight control signal. Chapter 3 – AMI BIOS Setup...

  • Page 99: Chipset: South Bridge

    3.5.2 Chipset: South Bridge Options summary: (default setting) Audio Controller Disabled Enabled Enable or disabled Azalia device for audio function. Chapter 3 – AMI BIOS Setup...

  • Page 100: Setup Submenu: Security

    Setup submenu: Security Options summary: (default setting) Administrator Password/ Not set User Password Change User/Administrator Password If an Administrator Password is set, it will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility.
  • Page 101 password for a final confirmation. Press Enter again after you have retyped it correctly. Removing the Password Highlight this item and type in the current password. At the next dialog box press Enter to disable password protection. Chapter 3 – AMI BIOS Setup...

  • Page 102: Setup Submenu: Boot

    Setup submenu: Boot Options summary: (default setting) Quiet Boot Disabled Enabled En/Disable showing boot logo. Boot Option #X/ XXXX Drive BBS Priorities The order of boot priorities. Chapter 3 – AMI BIOS Setup...

  • Page 103: Boot: Bbs Priorities

    3.7.1 Boot: BBS Priorities Options summary: (default setting) Boot Option #x Disabled Device name Sets the system boot order Chapter 3 – AMI BIOS Setup...

  • Page 104: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Options summary: (default setting) Save Changes and Reset Reset the system after saving the changes Discard Changes and Exit Reset system setup without saving any changes Restore Defaults Restore/Load Default values for all the setup options. Chapter 3 –...

  • Page 105: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 106: Product Cd/Dvd

    Product CD/DVD The GENE-BSW5 comes with a product DVD that contains all the drivers and utilities you need to setup your product. Insert the DVD and follow the steps in the autorun program to install the drivers. In case the program does not start, follow the sequence below to install the drivers. Step 1 –...
  • Page 107 Step 3 – Install Audio Drivers Click on the Step3 - Audio folder and select your OS Open the Setup.exe file in the folder Follow the instructions Drivers will be installed automatically Step 4 – Install LAN Drivers Open the Step4 - LAN folder and select your OS Open the Setup.exe file in the folder Follow the instructions Drivers will be installed automatically...
  • Page 108 Follow the instructions Drivers will be installed automatically Step 8 – Install Serial Port Drivers For Windows 7: Change User Account Control settings to Never notify Reboot and log in as administrator Chapter 4 – Driver Installation...
  • Page 109 Run patch.bat as administrator Chapter 4 – Driver Installation...
  • Page 110 For Windows 8: Open the Apps Screen, right click on the Command Prompt tile and select Run as Administrator To install the driver (patch.bat), you will first have to locate the file in command prompt. To do that, go to the folder in which the file resides by entering cd (file path) eg: if the file is in a folder named abc in c drive, enter cd c:\abc (screenshot for reference only) You are now at the folder where the file is located.
  • Page 111 Reboot after installation completes. To confirm the installation, go to Device Manager, expand the Ports (COM & LPT) tree and double click on any of the COM ports to open its properties. Go to the Driver tab, select Driver Details and click on serial.sys, you should see its provider as Windows (R) Win 7 DDK Provider.
  • Page 112 Chapter 4 – Driver Installation...
  • Page 113 For Windows 10: You will need administrator rights to install the drivers. To get it, first go to Computer Management in Control Panel and double-click on Administrator In the dialog box, uncheck the Account is disabled option to enable administrator account. Chapter 4 –...
  • Page 114 Restart and sign in as the administrator (not password-protected by default) Go back to the Windows 10 Serial Port drivers directory and run patch.bat as administrator. Chapter 4 – Driver Installation...

  • Page 115: Note On Ehci

    Note on EHCI With the EHCI controller no longer available on the Intel ® Pentium ® N3000 platforms, it is recommended to install Windows 7 through a SATA bus, eg SATA DVD-ROM. For input devices, PS/2 keyboard and mouse should be used. Chapter 4 –...

  • Page 116: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 117: Watchdog Timer Registers

    Watchdog Timer Registers Table 1 : Watch dog relative IO address Default Value Note I/O Base I/O Base address for Watchdog operation. 0xA10 Address This address is assigned by SIO LDN7, register 0x60-0x61. Table 2 : Watchdog relative register table Register Offset BitNum...

  • Page 118: Watchdog Sample Program

    A.2 Watchdog Sample Program ****************************************************************************** // WDT I/O operation relative definition (Please reference to Table 1) #define WDTAddr 0x510 // WDT I/O base address Void WDTWriteByte(byte Register, byte Value); byte WDTReadByte(byte Register); Void WDTSetReg(byte Register, byte Bit, byte Val); // Watch Dog relative definition (Please reference to Table 2) #define DevReg 0x00 // Device configuration register #define WDTRstBit 0x80 // Watchdog WDTRST# (Bit7)
  • Page 119 VOID AaeonWDTEnable (){ WDTEnableDisable(1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (byte Counter, BOOLEAN Unit){ // Disable WDT counting WDTEnableDisable(0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(Timer, Unit); VOID WDTEnableDisable(byte Value){ If (Value == 1) WDTSetBit(TimerReg, EnableBit, 1); else WDTSetBit(TimerReg, EnableBit, 0);...
  • Page 120 VOID WDTWriteByte(byte Register, byte Value){ IOWriteByte(WDTAddr+Register, Value); byte WDTReadByte(byte Register){ return IOReadByte(WDTAddr+Register); VOID WDTSetBit(byte Register, byte Bit, byte Val){ byte TmpValue; TmpValue = WDTReadByte(Register); TmpValue &= ~(1 << Bit); TmpValue |= Val << Bit; WDTWriteByte(Register, TmpValue); ******************************************************************************* Appendix A – Watchdog Timer Programming...

  • Page 121: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...

  • Page 122: I/O Address Map

    I/O Address Map Appendix B – I/O Information...

  • Page 123: Memory Address Map

    Memory Address Map Appendix B – I/O Information...

  • Page 124: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...

  • Page 125: Appendix C - Digital I/O Ports

    Appendix C Appendix C – Digital I/O Ports...

  • Page 126: Electrical Specifications For Digital I/O Ports

    Electrical Specifications for Digital I/O Ports Table 1 : Digital Input/Output Pin Electrical Specification Input Threshold Output Voltage Voltage Type Note High High DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 Note: All DIO pins are 5V tolerant in input mode. Appendix C –...

  • Page 127: Di/O Programming

    DI/O Programming GENE-BSW5 utilizes FINTEK F81801U chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial DI/O program is also attached, based on which you can develop customized program to fit your application. There are three steps to complete the configuration setup: (1) Enter the MB PnP Mode (2) Modify the data of configuration registers...

  • Page 128: Digital I/O Register

    Digital I/O Register Table 2 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F) 0x2F or 0x4F Table 3 : Digital Input/Output relative register table Register Note GPIO0 Direction...

  • Page 129: Digital I/O Sample Program

    C.4 Digital I/O Sample Program ************************************************************************** // SuperIO relative definition (Please reference to Table 2) #define SIOIndex 0x2E #define SIOData 0x2F #define DIOLDN 0x06 IOWriteByte(byte IOPort, byte Value); IOReadByte(byte IOPort); // DIO relative definition (Please reference to Table 3) #define DirReg_L 0x88 // 0:input, 1: output #define DirReg_H...
  • Page 130 PinStatus = AaeonReadPinStatus(Pin3Bit); // Procedure : AaeonSetOutputLevel // Input : Example, Set Digital I/O Pin 2 to high level AaeonSetOutputLevel(Pin2Bit, PinHigh); ************************************************************************** ************************************************************************** Boolean AaeonReadPinStatus(byte PinBit){ Boolean PinStatus ; PinStatus = SIOBitRead(DIOLDN, StatusReg_L, PinBit); Return PinStatus ; VOID AaeonSetOutputLevel(byte PinBit, byte Value){ ConfigDioMode(PinBit, OutputPin);...
  • Page 131 TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); VOID SIOByteSet(byte LDN, byte Register, byte Value){ SIOEnterMBPnPMode(); SIOSelectLDN(LDN); IOWriteByte(SIOIndex, Register); IOWriteByte(SIOData, Value); SIOExitMBPnPMode(); ******************************************************************************** ******************************************************************************** Boolean SIOBitRead(byte LDN, byte Register, byte BitNum){ Byte TmpValue; SIOEnterMBPnPMode();...
  • Page 132 Appendix C – Digital I/O Ports...

  • Page 133: Appendix C - Notes For Users

    Appendix D Appendix C – Notes for Users...

  • Page 134: Notes For Users

    Notes for Users Please observe the following items to ensure optimal performance: To achieve SATA Gen 3 transfer speeds, please use a SATA Gen 3 SSD with a SATA GEN 3 cable not longer than 60 cm in length. Appendix D – Notes for Users...

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