Mbcg46183-129Pfv-G (Xv833A00) Gate Array; Lsi Pin Description （Lsi 端子機能表 - Yamaha DME24N Service Manual
Digital mixing engine
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Also See for DME24N:
- Manual del instrucción (80 pages) ,
- Owner's manual supplement (8 pages) ,
- Owner's manual (482 pages)
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LSI PIN DESCRIPTION
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CS5361-KZ (X4951A00) ADC (Analog to Digital Converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
HD6417727F160C (X2890B00) CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
ICS1893 (XZ658A00) PHY (Physical Layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
MBCG46183-129PFV-G (XV833A00) Gate Array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
MBCG61594-130 (X3299A00) ATSC2A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
S1L51252F32S000 (X3775A00) PLLP2 (Gate Array) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
SIS60000F00A500 (X4834A00) Intelligent Network Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
XC9572XL-10TQ100C (X4769A00) CPLD (Complex Programmable Logic Device) . . . . . . . . . . . . . 33
XC9572XL (X4769B00) CPLD (Complex Programmable Logic Device) . . . . . . . . . . . . . . . . . . . . . . 33
XC9572XL-10TQ100C (X4765A00) CPLD (Complex Programmable Logic Device) . . . . . . . . . . . . . 33
XC9572XL (X4765B00) CPLD (Complex Programmable Logic Device) . . . . . . . . . . . . . . . . . . . . . . 33
YM3436D-FZ (XG948E00) DIR2 (Digital Format Interface Receiver) . . . . . . . . . . . . . . . . . . . . . . . . . 37
YSS910-S (XV988A00) DSP6 (Digital Signal Processor) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
YSS910-V (XV988B00) DSP6 (Digital Signal Processor) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
YSS919B-H (XZ693B00) DSP7 (Digital Signal Processor) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
MBCG46183-129PFV-G (XV833A00) Gate Array
PIN
NAME
I/O
NO.
1
D5
I/O
2
D6
I/O
Data Bus
3
D7
I/O
4
/IRQ0
I/O
Interrupt Request Port 0
5
/IRQ1
I/O
Interrupt Request Port 1
6
Vss
Ground
7
/IRQ2
I/O
Interrupt Request Port 2
8
IRQ3
I/O
Interrupt Request Port 3
9
/RD
I
Read Signal Input
10
/WR
I
Write Signal Input
11
/CE
I
Chip Enable Input
12
/ASTB
I
Address Strobe (Not used: to ground)
13
TESTSIO
I
Input with Pull-down Resistor (50k)
14
RX0
I
Receive Data 0
15
TX0
O
Transmit Data 0
16
RX1
I
Receive Data 1
17
TX1
O
Transmit Data 1
18
Vss
Ground
19
Vdd
Power Supply
20
RX2
I
Receive Data 2
21
TX2/BO2
O
Transmit Data 2
22
RX30
I
Receive Data 30
23
TX30
O
Transmit Data 30
24
TX31
I
Receive Data 31
（LSI 端子機能表）
FUNCTION
PIN
NAME
I/O
NO.
25
TX31
O
Transmit Data 31
26
RX32
I
Receive Data 32
27
TX32
O
Transmit Data 32
28
RX33
I
Receive Data 33
29
TX33
I/O
Transmit Data 33
30
/IC
I
Initial Clear
31
Vss
Ground
32
XI
I
Quartz Crystal Input
33
Vss
Ground
34
XO
I/O
Quartz Crystal Onput
35
A0
I
36
A1
I
37
A2
I
Address Bus
38
A3
I
39
A4
I
40
A5
I
41
CPUCLK
I
CPU Clock
42
Vss
Ground
43
Vdd
Power Supply
44
D0
I/O
45
D1
I/O
46
D2
I/O
Data Bus
47
D3
I/O
48
D4
I/O
DME24N/DME64N
DME24N DM: IC900
DME64N DM: IC900
FUNCTION
31
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