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Panasonic MN662785TBUC Manual page 70

Signal processing ic for cds

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MN 6 6 2 7 8 5 T B U C
P a r a m e t e r
A n a l o g S y s t e m I n p u t P i n ( 1 )
C 1 3
Input current
A n a l o g S y s t e m I n p u t P i n ( 2 )
C 1 4
I n p u t s i g n a l a m p l i t u d e
C15
Input leakage current
A n a l o g S y s t e m I n p u t P i n ( 3 )
C16
I n p u t l e a k a g e c u r r e n t
I n t e r n a l r e s i s t a n c e
C 1 7
b e t w e e n A R F a n d D R F
S y m b o l
Conditions
I
R E F
I
When pulled up by a 47-kΩ resistor
R E F
A R F
Input level of the EFM signal in the
V
application circuit of the DSL circuit
A R F
block
I
L K A
D R F
I
L K D
R
ARF=1.65 V
DRF
SDD00026AEM
 
D V
=3 . 3 V , D V
D D 1 , 2
A V
=3 . 3 V , A V
D D 1 , 2
T a =
−4 0°C t o +8 5°C
=3 3 . 8 6 8 8 M H z
f
X 1
Limits
Min
T y p
Max
2 5
4 7
8 0
0.5
1.0
±1.0
±1 . 0
1 0
=0 V
S S 1 , 2
=0 V
S S 1 , 2
Unit
µA
V [ p - p ]
µA
µA
k
70

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