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PLM-A35
4-2.
BLOCK DIAGRAM – LCD Section –
Y
Y ATT
Y BUFFER
A
Q811
(Page 4-2)
C
C ATT
C BUFFER
B
Q813
(Page 4-2)
RG CS
C
(Page 4-2)
CLK
D
(Page 4-2)
DATA
E
(Page 4-2)
CLK
13
14
DI
DACS
F
12
LD
(Page 4-2)
D/A CONVERTER
• SIGNAL PATH
: VIDEO
LCD RGB DECODER,
LCD DRIVE,
LCD TIMING GENERATOR
IC801
Y IN
B OUT
59
40
Q812
61
SYNC IN
G OUT
43
R OUT
45
57
C IN
Q814
HCK1
18
HCK2
17
HST2
13
CLR
6
LOAD
12
EN2
30
VCK4
24
VST
23
8
SCLK
7
DATA
A01
15
XVST
22
A02
2
A03
3
A04
4
50
VXO OUT
X801
3.5795MHz
51
VXO IN
IC804
HD
21
05
4-3
VST R
COM R
COM L
BACK LIGHT
LED DRIVE
CONTROL SWITCH
Q703 – 705
Q701, 702
BACK LIGHT
LED DRIVE
CONTROL SWITCH
Q708 – 710
Q706, 707
R
G
B
HCK1
LCD
HCK2
UNIT
(RIGHT SIDE)
HST
CLR
EN
VCK
R
G
B
HCK1
LCD
UNIT
HCK2
(LEFT SIDE)
HST
CLR
EN
VCK
VST L
CN803
4
R OUT
2
G OUT
FOR
3
CHECK
B OUT
6
HD
LED
BACK LIGHT
(RIGHT SIDE)
LED
BACK LIGHT
(LEFT SIDE)
4-4

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