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REGISTERS
ANALOG CONTROL REGISTER 0 : REGISTER 21
[ANARC0] 15h
15
•
QinA
•
PinA
ANALOG CONTROL REGISTER 1 : REGISTER 22
[ANARC1] 16h
15
14
13
12
UPDNB S1
S0 QFCBP FR PDWS PDSQ PDSG PDR
•
Qinl
•
USEPQ
•
PDDRV
•
PDTP
•
PDRP
•
PDRE
•
PDPF
•
PDR
•
PDSG
•
PDSQ
•
PDWS
•
FR
•
QFCBP
•
S1 ~ S0
•
UPDNB
7-14
QinH ~ QinA
Equalizer HPF s/w
Equalizer BPF s/w
11
10
9
use PQ
Power down TXPLL
Power down TXPLL
Power down RXPLL
Power down Reference
Power down Prefilter
Power down Reference
Power down Signal Dectect
Power down Squelch
Power down Waveshaper
Freeze
QFC Bypass
KS8910 100/10 Mbps ETHERNET TRANSCEIVER
8
7
The fixed output value of prefilter counter when Use_PQ(Reg(16.1)=1
Thefixed output value of prefilter counter.
8
7
6
5
PDPF PRRE PDRP PDTP PDDRV USEPQ Qinl
TheMSB value of ' 0 ' input of prefilter counter.
The Initial selection of the output value of prefilter counter.
1 = PQ value select
0 = Normal operatoin value select
Power Down for DRIVER.
Power Down for TXPLL.
Power Down for RXPLL.
Power Down for Reference and X-tal.
Power Down for bias bulk of prefilter.
Power Down for reference.
Power Down for Signal Detect and prefilter.
Power Down for Squelch(10RX).
Power Down for Waveshaper.
The operation Halt of prefilter counter MUX.
RXPLL Input data selection between QFCOUTPUT data and external
input data. If set(=1), Selected external input.
Band Gap Reference Level comparing reference.
Band Gap Reference Level comparing reference.
Preliminary Spec. ver
PinH ~ PinA
4
3
2
1.4
15h
0
16h
1
0
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