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Philips Semiconductors
1.3GHz low voltage fractional-N synthesizer
13
CLOCK
14
DATA
15
STROBE
5
RFin+
6
RFin–
AMP
12
REF
in+
REF
in–
11
2
TEST
PINNING
SYMBOL
PIN
LOCK
1
Lock detect output
TEST
2
Test (should be either grounded or
connected to V
V
3
Digital supply
DD
GND
4
Digital ground
RFin+
5
RF input to main divider
RFin–
6
RF input to main divider
GND
7
Charge pump ground
CP
PHP
8
Main normal chargepump
V
9
Charge pump supply voltage
DDCP
R
10
External resistor from this pin to ground
SET
sets the chargepump current
REFin–
11
Reference input
REFin+
12
Reference input
CLOCK
13
Programming bus clock input
DATA
14
Programming bus data input
STROBE
15
Programming bus enable input
PON
16
Power down control
1999 Nov 04
22–BIT SHIFT
2–BIT SHIFT
REGISTER
REGISTER
CONTROL
ADDRESS DECODER
LATCH
LOAD SIGNALS
LATCH
MAIN DIVIDER
LATCH
REFERENCE
DIVIDER
Figure 2. Block Diagram
DESCRIPTION
DD)
GND
4
PUMP
CURRENT
SETTING
PUMP
BIAS
COMP
PHASE
DETECTOR
3
V
DD
3
Product specification
SA7016
10
R
SET
9
V
DDCP
8
PHP
7
GND
CP
1
LOCK
16
PON
SR01506
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