Table of Contents
Advertisement
4.2
EMI PROGRAMMING MODEL
The EMI registers available to the programmer are shown in Figure 4-1 on page 4-6.
All accessible registers are mapped into the internal I/O memory space. These
registers can be accessed through regular MOVE instructions or by peripheral move
(MOVEP) instructions. The registers are described in the following sections. The
interrupt vector table for the EMI is shown in Table 4-1 . The interrupts generated by
the EMI are prioritized, as shown in Table 4-2 . Since either a read condition or a
write condition (but not both) can trigger an interrupt, the read data and write data
interrupts share the same level of priority.
Address
P: $0030
P: $0032
P: $0034
P: $0036
Priority
highest
lowest
MOTOROLA
Table 4-1 EMI Interrupt Vector
Table 4-2 EMI Internal Interrupt Priorities
DSP56009 User's Manual
External Memory Interface
EMI Programming Model
Interrupt Source
EMI Write Data
EMI Read Data
EMI EBAR0 Memory Wrap
EMI EBAR1 Memory Wrap
Interrupt Source
EMI EBAR0 Memory Wrap
EMI EBAR1 Memory Wrap
EMI Read or Write Data
4-5
Advertisement
Table of Contents
