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• Choice of bus mode: Cycle steal mode or burst mode
• Two types of DMAC channel priority ranking:
Fixed priority mode: Channel priorities are permanently fixed.
Round robin mode: Sets the lowest priority for the channel for which an execution request
was last accepted.
• An interrupt request can be sent to the CPU on completion of the specified number of
transfers.
• On-demand data transfer mode (DDT mode)
In this mode, interfacing between an external device and the DMAC is performed using the
'%5(4, %$9/, 75, 7'$&., and ID [1:0] pins. External requests can be accepted on all four
channels.
For channel 0, data transfer can be carried out with the transfer mode, number of transfers,
transfer address (single only), etc., specified by the external device.
For channels 1 to 3, when transfer is performed by means of an on-chip peripheral module
request or auto-request, the operation is the same as in the normal mode. On these channels,
data transfer can be initiated by an external request.
Channel 0: Single address mode. External requests are accepted
The SH7750S supports dual address mode.
Channel 1: Single or dual address mode. External requests are accepted.
Channel 2: Single or dual address mode. External requests are accepted.
Channel 3: Single or dual address mode. External requests are accepted.
In DDT mode, data transfer is carried out using the '%5(4, %$9/, 75, 7'$&., and ID
[1:0] signals to perform handshaking between the external device and the DMAC.
Rev. 4.0, 04/00, page 420 of 850
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