The Timing Trace Specification; [Single] Timing Trace Specification; [Continuous] Timing Trace Specification; Figure 6-9. Timing Trace Specification (With [Glitch] Selected) - HP 1630A Operating And Programming Manual

Logic analyzer
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Model 1630A/D/G
Timing Measurements
THE TIMING TRACE SPECIFICATION
There are two timing trace modes offered by the analyzer : [Single], and [Continuous] . These two trace modes
are described separately in the following paragraphs . Figure 6-9 is the timing trace Specification menu .
[Single] Timing Trace Specification
The [Single] trace mode is used to capture a single trace of timing activity for each bit in the timing probe pod(s) .
This menu allows selection of sample period, trigger location, trigger activity, and trigger duration .
[Continuous] Timing Trace Specification
In the [Continuous] mode of timing measurement, the analyzer performs a measurement just like in [Single] .
As soon as the measurement is complete and the display is updated, the analyzer begins another
measurement . This will continue until STOP is pressed .
Sample Period :
Trigger Location :
Trigger:
Pattern:
Edge :
Duration :
Trace Point Delay:
LABELS FROM
FORMAT
SPECIFICATION
Figure 6-9. Timing Trace Specification (with [Glitch] Selected)
from one sample every 10 ns to one sample every 500 ms (24 sample period
selections)
[Start], [Center], or [End] (determines amount of pretrigger and posttrigger
time in memory) .
combination of pattern and edge .
"And" field composed of 1, 0, or X logic levels on all bits in all labels .
"OR" field composed of positive-going, negative-going, either-edge, or off [.]
for each capable bit. Bits not capable of edge recognition are identified by
N/A.
from 20 ns to 1 ms (period that pattern must remain stableto be recognized as
trigger) in 1, 2, 5 sequence .
from 0000 ns to 9999 sec after trigger recognition . Max delay depends on
Sample Period selected . Note : the analyzer rounds off the delay entry to the
nearest multiple of four times the selected sample period .

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