Block Diagram 002 (Dm1000); Ada (002, 003) - Yamaha DM1000 Service Manual
Digital production console/ peak meter bridge/wooden side panels
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Also See for DM1000:
- Owner's manual (382 pages) ,
- Manual (30 pages) ,
- Startup manual (18 pages)
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G
BLOCK DIAGRAM 002 (DM1000)
MAIN
CN801-CN804(40P)
CPU_BUS
System Reset
Master clock
SL clock
OPT
TX,RX
SCI0(CPU)
CN801-CN804(40P)
WC SLOT1
SLOT1 clock
2or4ch/line
2or4ch/line
4
4
/
Selector
/
SLOT1
/
/
Selector
4
4
2or4ch/line
2or4ch/line
SLOT2 clock
2or4ch/line
2or4ch/line
4
4
Selector
/
/
SLOT2
/
Selector
/
4
4
2or4ch/line
2or4ch/line
WC SLOT2
2Tr Reset
JK1
JK1
JK001
2TR IN
DIGITAL
(AES/EBU)
2TR IN
JK002
DIGITAL
(COAXIAL)
JK003
2TR OUT
DIGITAL
(AES/EBU)
2TR OUT
JK002
DIGITAL
(COAXIAL)
JK51
WC BNC
IN
WORD
JK52
CLOCK
OUT
WC OUT
IN
SCI2(CPU)
JK151
MIDI
OUT
SCI2(CPU)
CN651(9P),
CN651(9P),
CN652(40P)
CN652(40P)
28CA1-8826678-2
1
F
E
Crystal
Crystal
oscillator
oscillator
DFS
49.152MHz
45.1584MHz
X131
X132
Address
1/2
1/2
Decoder
&
1/2
Register
1/2
External
3
/
WC
Selector
System Reset
PLL
96K/88.2K
2 /
TLC2932
IC143(14P)
Master clock
4ch/line
4
IC501(144P)
/
ATSC2A
/
4
4ch/line
4ch/line
4
IC502(144P)
/
ATSC2A
/
4
4ch/line
System
Reset
2TR RMCK1
DIR
2ch/line
CS8420
2TR DIN1
IC601(28P)
DIR
2ch/line
CS8420
2TR DIN2
IC602(28P)
2TR RMCK2
DIT
CS8405
2ch/line
2TR DOUT1
IC605(28P)
2ch/line
DIT
2TR DOUT2
CS8405
IC606(28P)
Master clock
DSP Reset
D
C
CPU_BUS
PLLP2
Crystal
IC136
11MHz
Selector
S
D
X001
e
44.1K x256
i
l
Master clock
48K x256
System
v
WC OUT
e
Reset
88.2K x256
i
SLOT1 clock
RESET
c
SLOT2 clock
96K x256
d
t
SL clock
IC012(5P)
e
WC x256
o
IC013(5P)
r
System
2TR(256fs)
r
Reset
PLL
48K/44.1K
5
DIR2
/
IC144(44P)
DIR Reset
CPU_BUS
System Reset
Crystal
oscillator
60MHz
X401
DSP block
DSP7 x6
DSP6 x4
SDRAM 16M x6
DRAM 4M x8
CPU_BUS
(See Page 4)
Master clock (MCLK,64Fs,Fs)
2ch/line
6
/
/
2
2ch/line
2ch/line
8
/
2ch/line
2ch/line
B
IC010(48P) IC004-IC005(54P) IC006-IC009(44P)
IC011(9P)
Flash
SDRAM
SRAM
Backup
32M
64M x2
8M x4
controller
LCD
BT001
Module
CN501
CN502(12P), CN504(4P)
(16P)
IC001
LCD
SH-3 CPU
LCD Reset
LCD
(208P)
Controller
DSP Reset
(SH7709H)
(S1D13704F)
2Tr Reset
IC027
(See Page 5)
CPU:132MHz
DIR Reset
(80P)
BUS:44MHz
ADA Reset
Internal I/O:22MHz
TC Reset
CN005
USB Reset
(16P)
SUB Reset
SCI0
SCI1
SCI2
LCD Reset
FD
CN203
SCI0
SCI2
CN003
(7P)
TO OPT
TO JK1 (MIDI)
CPU
(7P)
(SLOT1)
IC203
SUB Reset
(112P)
(See Page 5)
JK2
CN702
CN701
CN701
Serial I/F
(14P)
(14P)
SIO4
ch1
IC651
(48P)
ch0
JK1
CN201
S
e
CN651(9P),
l
CN652(40P)
e
c
t
o
CN651(9P),
r
CN652(40P)
CN101
CPU
CPU_BUS
M37641
IC102(80P)
USB Reset
JK251
Timecode
CPU_BUS
Generator
ICS2008B
TC Reset
IC254(39P)
CN301
CPU_BUS
Register
System Reset
CN901(27P)
ADA Reset, DFS
ADA
OMNI OUT 1-12
OMNI IN 1-4
CN953(27P)
HAAD
CN902
(32P)
SDATA 1-16
SDATA-TB
HP-L/R
CN951(32P)
Hard: Digital block
(System, Digital I/O, DSP)
BLOCK DIAGRAM 002 (DM1000)
A
DM1000
1
2
METER
(D-sub 15pin)
3
REMOTE
(SONY 9pin
/RS-422)
TO HOST
USB
SMPTE IN
4
CONTROL
(D-sub 25pin)
ANALOG
BLOCK
(See Page 6)
5
6
3
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