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Before the normal register display information is printed, the exception type information is
displayed. This includes the type of exception with its format/vector word and the following:
The upper nibble of the count register (Cnt. Reg.) contains the microcode revision number of the
MCU device. Consult the CPU32 Reference Manual, Section 6 Exception Processing for more
details.
Notice that the target stack pointer is different. The target stack pointer now points to the last
value of the stacked exception stack frame. Examine the exception stack frame using the MD
command.
CPU32Bug>MD (A7):C<CR>
00003FE8
A700 0000 3000 C008
00003FF8
0000 3000 0001 0065
CPU32Bug>
2.6 FUNCTION CODE SUPPORT
Function codes identify the address space being accessed on any given bus cycle, and are an
extension of the address. The function codes provide additional information required to find the
proper memory location.
For this reason, all debugger commands involving an address field were changed to allow the
specification of function codes:
The caret ( ^ ) symbol following the address field indicates that a function code specification
follows. The function code can be entered by specifying a valid function code mnemonic or by
specifying a number between 0 and 7. The syntax for address and function code specifications
are:
<ADDR>^<FC>
<ADDR>^^
<ADDR>^<FC>=
M68CPU32BUG/D REV 1
Mnemonic
SSW
Special Status Word
Fault Addr.
Faulted Address
Data
Data
Cur. PC
Program Counter
Cnt. Reg.
Internal Transfer
Count Register
Sets the function code to <FC> value.
Toggles the displaying of function code values.
Sets the function code to <FC> and the default function code to <FC>.
The default value at power up is SD.
Description
Offset
+$16
+$10
+$0C
+$02
+$14
00F0 0000 FFFF 3000
2-12
DEBUG MONITOR DESCRIPTION
'...0.@
p....0.
..0....e
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