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MB95630H Series
■ Both Edges Detection and SNIx/RDAx Comparison Timing Diagram
(CMPE = 1)
Figure 21.5-4 Both Edges Detection and SNIx/RDAx Comparison Timing Diagram (CMPE = 1)
CMPE
CPE1,
CPE0
RDA[2:0]
0b110
(OPDUR)
SNI2
SNI1
SNI0
WTIN1
COMPARISON
MATCH
■ WTIN1 Output Condition and Register Setting
Table 21.5-2 WTIN1 Output Condition and Register Setting
CMPE
CPE1
CPE0
0
0
0
0/1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Note:
When CMPE = 1, SEEx should be set to "0", setting SEEx = 1 is not recommended.
MN702-00009-2v0-E
0b001
SEEx
0
0
No output. (Initial value)
0/1
0
No output.
0
1
No output.
1
1
Detects SNIx rising edge.
0
1
Detects SNIx falling edge.
1
1
Detects SNIx both edges.
0
0/1
Setting prohibited.
1
0/1
Detects SNIx rising edge and SNIx/RDAx comparison match.
0
0/1
Detects SNIx falling edge and SNIx/RDAx comparison match.
1
0/1
Detects SNIx both edges and SNIx/RDAx comparison match.
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 21 MULTI-PULSE GENERATOR
0b11
COMPARISON
MATCH
WTIN1 Output Condition
21.5 Operations
0b010
COMPARISON
MATCH
395
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