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GE-622
CIRCUIT DESCRIPTION
2-2. Description of terminals
C10
a"
aR
be
I
=
| = |VRer
Reference voltage input for A/D converter.
F8~F14
AMP VR
Analog signal input for 1kHz~16kHz and AMP VR position detection.
(For inputting signal coming in by way of Multiplexer TC74HC4051.}
| 3
| ING
| ft [Fe
| 10kHz analog signa! input. (For inputting signals coming in directly from filter circuit.)
| 4
| INS]
Lo fFB
3.9kHz analog signal input. (For inputting signals coming in directly from filter circuit.)
| 5
| INA
| ot jra
1.5kHz analog signal input. (For inputting signals coming in directly from filter circuit.)
| 6
| INS
| 4 [Fs
625Hz analog signal input. (For inputting signals coming in directly from filter circuit.)
| 7
IN2
|
2
250Hz analog signal input. (For inputting signals coming in directly from filter circuit.)
ee
98Hz analog signal input. (For inputting signals coming in directly from filter circuit.)
| 9
| INO.
| 1 [Fo
| 40Hz analog signal input. (For inputting signals coming in directly from filter circuit.)
| 10~13 | P47~P44 | O |D D~A
4 — 10 Contro! signal output for Decoder TC74HC4028
|
SR
a
2 a
Se
NNR
PNET
(15 | Paz
| O [DATA | Output of NJU7305 CONTROL DATA signals for electronic VR of graphic equalizer,
-te_| Pal____| © [Lock | Ouput of NIU7506 CONTROL CLOCK sioei for elector VA of prptie equmfewr. _|
| 17
| P40
| O ISTO
Output of NJU7305 CONTROL ST signals for electronic VR of graphic equalizer.
| 1g | P37
|
1 Tsync
| Input for transfer display data indication signals. H : DISPLAY MODE data L : LEVEL or POINT data
| 19 | P36 (CLK) | O {CLOCK | CLOCK signal output for DISPLAY data transfer.
|
20 | P35 {Sour)| O |DATA
| DATA signal output for display.
| 21 | P34 ~~ | ©
[BUSY _ | Output for DISPLAY DATA TRANSFERRING signals. H : Data transferring
_L : Others
| 22 | P33_—«| 1 «READY __| Input for DISPLAY DATA TRANSFERRABLE signal. H : Not transferrable
_L : Transferable
| 23 | P32.
| ~«WO | SDATA | Input/Output for SYSTEM SERIAL DATA signal.
Input/Output for SYSTEM SERIAL BUSY signal.
| 25 | P30...
|
I ice
| BACK UP detection.
H: Others
L: Backing up
| 26 | cNvss | - [vss [Unused
| 27 | RESET | 1 [RESET [RESET signal detection, HH: Others L:
Reset
P28 [xm
|
XW
[Systerm clock input .0MH2)
| 29 | Xour
| O| XOUT
System clock pup.
|
er
ee
as Vss
Unused. (Clock input terminal for timer.)
Oe
ee
Unused. (Clock output terminal for timer.)
| 32 ives
| = |
Pees
[6
ie
Unused. (Output terminal for system. glock, he divided frequencies.)
.
eb
SE TRRBAKRO | KEY RETURN signal input.
ede
|
Pa Tie
= ee Pull down input
oC
| - 4 0 ~ 5 4
| P16~P00 | O |B1~B15 | Output for DISPLAY TUBE SEGMENT DRIVE.
— -H: ON _L: OFF
| 55 | P27
| O |ST___| STROBE Control signal to SELECTOR TC9163N, TC9164N.
Tas [ F260 [eLGK[eL0K cone sil SELECTOR TERN, TepIN,
57 | P25.
| © {DATA | DATA Control signal to SELECTOR TCOT63N, TCS164N.
| | 58 | P24.
|
O VIDEO! | | ON-OFF Control signa for VIDEO ae
ps_| pes | 0 |S | [ON-OFF Cont signal for BS/LD signa
| 60~62 | P22~P20 | O [C~A [8-91 Control signal output for muttiplexer TC74HC4051.
Sore ye T 1
aa
aa a
| 63 | Avec | = [Aveo __| Power supply for A/D converter (+5V)
[64 [vec
[= ]ee
Power supply for microprocessor (-6V
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