Philips SPENDEX 40 Maintenance Manual page 23
Speech encryption decryption equipment
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Also See for SPENDEX 40:
- Operating manual (25 pages) ,
- Operating instructions manual (21 pages)
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S P E N D E X 4 0 U A 8 2 5 1 / 0 0 A N D / O l L I M I T E D M A I N T E N A N C E M A N U A L
4 . 7 K e v g e n e r a t o r b o a r d
4 . 7 . 1 S e r i e s / p a r a l l e l c o n v e r t e r t r a n s m i t t i n g s i d e
The series/parallel converter transmitting side converts the data
signal RAOUT coming from the Data Terminal Equipment in parallel form
for the comsec controller.
4 . 7 . 2 K e y g e n e r a t o r s t r a n s m i t t i n g s i d e
On the transmitting side the equipment is provided with 2 identical
key generators, the Primary Key Generator (PKG) and the Check Key
Generator (CKG). The PKG generates key bit series required for the
encryption of the data to be transmitted. The CKG generates the same
key bit series. By comparing these series the key generators control
one another. In case of deviations in the results or a breakdown in
one of the key generators, there will be a key generator alarm (AL1
or AL2).
4 . 7 . 3 P a r a l l e l / s e r i e s c o n v e r t e r t r a n s m i t t i n g s i d e
The parallel/series converter transmitting side converts the data to
be transmitted, which come from the comsec controller, into a serial
bit stream of 2400 bit/s.
4 . 7 . 4 S e r i e s / p a r a l l e l c o n v e r t e r r e c e i v i n g s i d e
The series/parallel converter receiving side converts the received
data signal RXD into parallel data for the comsec controller.
4 . 7 . 5 K e y g e n e r a t o r r e c e i v i n g s i d e
This key generator, the Receive Key Generator (RKG), generates the
key bit series required for decryption of the received data.
4 . 7 . 6 P a r a l l e l / s e r i e s c o n v e r t e r r e c e i v i n g s i d e
The parallel/series converter receiving side converts the decrypted
data, which come from the comsec controller and are destined for the
Data Terminal Equipment, into a serial bit stream of 2400 bit/s.
4 . 7 . 7 A l a r m c i r c u i t
The alarm circuit produces an interrupt signal CRAL (crypto-alarm),
as soon as a key generator alarm (AL1 or AL2), a CIK-alarm (CIKAL), a
FILL-alarm (FILAL) or a zeroise alarm (ZERAL) occurs. The moment the
CRAL-signal becomes high, the signals BL0K1 and BL0K2 are activated,
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