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Model 3465B
Section IV
CLOCK
(lOOkHz)
DIGIT
ACTIVATION
TO DISPLAY
BCD OUT
TO DISPLAY
SCAN
TXFR
COUNT
'EXTEND
RESET
DIGIT
SELECT
DECODER
BUFFER
BUFFERS
COUNTER
MULTIPLEXER
LATCHES
3'»65-e'4l74
Figure 4-8. Data Accumulator.
derived from Vg and the + II V output of the power
supply. A series voltage regulator, Q21, Q22 and Q23
maintains the + 3 V output constant. This provides con
stant display intensity for changes in the magnitude of Vg
due to battery life and results in low power consumption
for a high Vg (new or recharged batteries).
4-71. Twenty-five connections interface the display and
the main assembly. Table 4-1 indicates each terminal and
the source of the signal from the main assembly.
Table 4-1. Display Interface Connections.
CONNECTION DESIGNATION
SOURCE OF SIGNAL
DIGIT STROBES: MSD, 2MSD, 3MSD, LSD
BCD: 1,2,4,8
DATA ACCUMULATOR
(A1U11)
DECIMAL POINT: A, B, C, D
RANGE SWITCHES
FUNCTION SWITCHES
POLARITY ENABLE: PE
POLARITY: PL
A1U4
LOGIC
SECTION
OVERRANGE: OR
OVERLOAD: OL
A1U5
A1U6
TRANSFER: TR
-rVg,-HI V, GND,-7 V
POWER SUPPLY
PIN 25
NO CONNECTION
4-9
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