Panasonic FZ-1 Service Manual page 8

3d0 interactive multiplayer

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1-5. Block Explanation

CPU

CPU is ARM60. This RISC type micro processer has 32-bit address and 32-bit data path.

MADAM supplies CPU with 12.5 MHz clock.

ROM

1 MB ROM stores the system management program. The ROM is connected to Slow bus and its data is

read by MADAM and MADAM arranges 8-bit data into 32-bit word and send it to CPU.

SRAM

32 KB SRAM is connected to Slow bus. Since Lithium battery backs up SRAM while power is down,

SRAM can retain data. It may be used to back up game data, for example.

DRAMNRAM

DRAM and VRAM is used as main memory.

VRAM is dual-port memory. This means one port is used as normal DRAM and the other one is used to

read and write data simultaneously with the former port. Therefore, it is used as Frame Buffer which is

required fast access.

MADAM

MADAM is Address Engine. It includes OMA logic, CPU control logic, bus sharing logic and Cell Engine.

A oscillator provides MADAM with 50 MHz clock, and MADAM divides it by two, and it provides CLIO, CPU

and CD-ROM interface with 25 MHz clock.

CLIO

CLIO is Data Engine. It includes pixel decoding logic, 16-bit Digital Signal Processer and video interface

logic. With a crystal, CLIO oscillates 24.5454 MHz clock and supplies MADAM with 24.54 MHz and

supplies Digital Color Encoder with 12.27 MHz.

Digital Color Encoder

CLIO supplies Digital Color Encoder with RGB data and some control signals. And Digital Color Encoder

modifies them into NTSC signals. It outputs both composit signal and Y/C signal.

Audio DAC

16-bit Audio DAC converts digital audio data from CLIO into analog audio data.

CLIO sends DAC data with serial communication manner.

CD-ROM interface

CD-ROM interface Gate Array is the interface between CLIO and both internal CD-ROM drive and External

drives which are connected through Expansion Port.

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FZ-1