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Philips Semiconductors
Volume 1
For example, if a system wakes up from power-down using a low level on external
interrupt 0 pin, its post-wakeup code must reset the EINT0 bit in order to allow future entry
into the power-down mode. If the EINT0 bit is left set to 1, subsequent attempt(s) to invoke
power-down mode will fail. The same goes for external interrupt handling.
More details on power-down mode will be discussed in the following chapters.
Table 8:
External Interrupt Flag register (EXTINT - address 0xE01F C140) bit description
Bit
Symbol
Description
0
EINT0
In level-sensitive mode, this bit is set if the EINT0 function is selected for its pin, and the pin is in
its active state. In edge-sensitive mode, this bit is set if the EINT0 function is selected for its pin,
and the selected edge occurs on the pin.
Up to two pins can be selected to perform the EINT0 function (see P0.1 and P0.16 description in
"Pin Configuration" chapter page 64.)
This bit is cleared by writing a one to it, except in level sensitive mode when the pin is in its active
state (e.g. if EINT0 is selected to be low level sensitive and a low level is present on the
corresponding pin, this bit can not be cleared; this bit can be cleared only when the signal on the
pin becomes high).
1
EINT1
In level-sensitive mode, this bit is set if the EINT1 function is selected for its pin, and the pin is in
its active state. In edge-sensitive mode, this bit is set if the EINT1 function is selected for its pin,
and the selected edge occurs on the pin.
Up to two pins can be selected to perform the EINT1 function (see P0.3 and P0.14 description in
"Pin Configuration" chapter on page 64.)
This bit is cleared by writing a one to it, except in level sensitive mode when the pin is in its active
state (e.g. if EINT1 is selected to be low level sensitive and a low level is present on the
corresponding pin, this bit can not be cleared; this bit can be cleared only when the signal on the
pin becomes high).
2
EINT2
In level-sensitive mode, this bit is set if the EINT2 function is selected for its pin, and the pin is in
its active state. In edge-sensitive mode, this bit is set if the EINT2 function is selected for its pin,
and the selected edge occurs on the pin.
Up to two pins can be selected to perform the EINT2 function (see P0.7 and P0.15 description in
"Pin Configuration" chapter on page 64.)
This bit is cleared by writing a one to it, except in level sensitive mode when the pin is in its active
state (e.g. if EINT2 is selected to be low level sensitive and a low level is present on the
corresponding pin, this bit can not be cleared; this bit can be cleared only when the signal on the
pin becomes high).
3
EINT3
In level-sensitive mode, this bit is set if the EINT3 function is selected for its pin, and the pin is in
its active state. In edge-sensitive mode, this bit is set if the EINT3 function is selected for its pin,
and the selected edge occurs on the pin.
Up to three pins can be selected to perform the EINT3 function (see P0.9, P0.20 and P0.30
description in "Pin Configuration" chapter on page 64.)
This bit is cleared by writing a one to it, except in level sensitive mode when the pin is in its active
state (e.g. if EINT3 is selected to be low level sensitive and a low level is present on the
corresponding pin, this bit can not be cleared; this bit can be cleared only when the signal on the
pin becomes high).
7:4
-
Reserved, user software should not write ones to reserved bits. The value read from a reserved
bit is not defined.
User manual
Rev. 01 — 24 June 2005
UM10120
Chapter 3: System Control Block
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Reset
value
0
0
0
0
NA
21
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