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EN 38
7.
Q552.1HE LA
7. Circuit Descriptions
Index of this chapter:
7.1 Introduction
7.2 Power Supply
7.3 DC/DC Converters
7.4 Front-End Analogue and DVB-T, DVB-C; ISDB-T reception
7.5 HDMI
7.6 Video and Audio Processing - PNX85500
Notes:
•
Only new circuits (circuits that are not published recently)
are described.
•
Figures can deviate slightly from the actual situation, due
to different set executions.
•
For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
9. Block
Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB
you will find a separate drawing for clarification.
2010-Nov-19
Circuit Descriptions
Layouts).Where necessary,
Figure 7-1 Architecture of TV550 platform: with TCON integrated in display
7.1
Introduction
The Q552.1E LA is a new chassis launched in Europe in 2010.
The whole range is covered by PNX8550x main IC so-called
NXP TV550 platform.
The major deltas versus its predecessor Q543/Q548 are the
DVBS, DLNA1.5+, Wireless Laptop Live (WLL-Dongle),
Ethernet, and WiFi Ready (Net-TV) functionality.
7.1.1
Implementation
Key components of this chassis are:
•
PNX85500 System-On-Chip (SOC) TV Processor
•
TX31XX Hybrid Tuner (DVB-T/C, analogue)
•
STV6110AT DVB-S Satellite Tuner
•
SII9x87 HDMI Switch
•
TPA312xD2PWP Class D Power Amplifier
•
LAN8710 Dual Port Gigabit Ethernet media access
controller.
7.1.2
TV550 Architecture Overview
For details about the chassis block diagrams refer
to
chapter 9. Block
architecture can be found in
back to
div. table
Diagrams. An overview of the TV550
Figure
7-1.
18770_244_100203.eps
100219
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