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Schematic of the Crystal Part (19.2MHz)
VREG_L12_1V8
TP1
BB_CLK has special layout and component requirements.
Please refer to 80-NC833-14 for more information.
VREF_BAT_THERM
VREF_LPDDR2
LGE Internal Use Only
PMIC_SPMI_CLK
PMIC_SPMI_DATA
X4100
1RAA19200AAA
4
3
SENSOR XTAL2
1
2
XTAL1
GND1
19.2MHz
(07/01)
Check TP1
(VREG_XO)
1.9V ≥ VREG_XO ≥ 1.7V
Yes
Check TP2
(19.2 MHz)
19.2 MHz Signal
Yes
XO OK
PM_KYPD_PWR_N
JTAG_PS_HOLD
R4104
MSM_PS_HOLD
R4105
MSM_RESIN_N
R4107
R4108
QCT Ref.J (11/5)
BB_CLK_EN
WTR0_XO_IN
Rev1,0) ESD
XO_G_TCXO
BB_CLK
NFC_CLK_OUT
SLEEP_CLK
QCT Ref.checklist
No
Check PM8226
No
Check soldering and
components
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Copyright © 2014 LG Electronics. Inc. All right reserved.
3. TROUBLE SHOOTING
85
CBL_PWR_N
102
KPD_PWR_N
108
OPT_2
119
OPT_1
100
10K
PS_HOLD
101
0
RESIN_IN
77
RevB
TP4103
PON_RESET_N
112
0
SPMI_CLK
123
0
SPMI_DATA
120
XO_THERM
63
GND_XOADC
5
XTAL_19M_IN
6
XTAL_19M_OUT
62
GND_XO_BUFF
17
GND_XO
44
BB_CLK1_EN
TP2
13
RF_CLK1
39
RF_CLK2
31
R4110
0
BB_CLK1
42
R4112
0
BB_CLK2
88
R4114
0
SLEEP_CLK1
(05/30)
169
VREF_BAT_THM
61
VREF_LPDDR
129
REF_BYP
117
GND_REF
Only for training and service purposes
U4100
PM8226
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Troubleshooting
