Configuration Of Power-On-Clear Circuit; Operation Of Power-On-Clear Circuit; Block Diagram Of Power-On-Clear Circuit; Timing Of Internal Reset Signal Generation In Power-On-Clear Circuit - NEC 78K0 User Manual
8-bit single-chip microcontrollers
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24.2 Configuration of Power-on-Clear Circuit
The block diagram of the power-on-clear circuit is shown in Figure 24-1.
Mask option
24.3 Operation of Power-on-Clear Circuit
In the power-on-clear circuit, the supply voltage (V
V
, an internal reset signal is generated.
POC
Figure 24-2. Timing of Internal Reset Signal Generation in Power-on-Clear Circuit
Supply voltage (V
)
DD
POC detection voltage
(V
)
POC
2.7 V
Internal reset signal
CHAPTER 24 POWER-ON-CLEAR CIRCUIT
Figure 24-1. Block Diagram of Power-on-Clear Circuit
V
V
DD
DD
Detection
voltage source
(V
)
POC
User's Manual U15947EJ2V0UD
+
−
) and detection voltage (V
DD
*
Internal reset signal
) are compared, and when V
POC
<
DD
Time
477
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