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Table A-1 Power Management (P0)
P1 Pin
Row G
1
Vs1
2
Vs1
3
Vs3
4
NC
5
NC
6
GA3#
7
TCK
8
GND
Table A-2 Power Management (J0)
J1 Pin
Row I
Row H
1
Vs1
Vs1
2
Vs1
Vs1
3
Vs3
Vs3
4
GND
NC
5
GND
NC
6
GND
GA3#
7
TCK
GND
8
NC
GND
69 SBC622 Hardware Reference Manual
A.1.1 Backplane P0/J0 Connector
VPX P0/J0 connects to power management.
P0
Row F
Row E
Vs1
Vs1
Vs1
Vs1
Vs3
Vs3
NC
GND
GA4#
GND
GA2#
GND
GND
TDO
NC
NC
J0
Row G
Row F
Vs1
Vs1
Vs1
Vs1
Vs3
Vs3
NC
GND
GA4#
GND
GA2#
GND
GND
TDO
NC
NC
NOTE
Per VITA 46 specification for 6U boards, VS1=12V and VS3=5V nominal.
Row D
Row C
Row B
NC
NC
NC
NC
NC
NC
NC
Vs3
Vs3
-12V Aux
GND
SYSRESET#
3v3 Aux
GND
SMB_CLK
+12V Aux
GND
GA1#
TDI
GND
TMS
GND
NC
NC
Row E
Row D
Row C
NC
NC
NC
NC
NC
NC
NC
Vs3
Vs3
-12V Aux
GND
SYSRESET#
3v3 Aux
GND
SMB_CLK
+12V Aux
GND
GA1#
TDI
GND
GND
GND
NC
NC
Row A
NC
NC
Vs3
NVMRO
SMB_DAT
GA0#
TRST#
GND
RowB
Row A
NC
NC
NC
NC
Vs3
Vs3
NVMRO
GND
SMB_DAT
GND
GA0#
GND
TMS
TRST#
GND
NC
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