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6.2
CPU 312C
6.2
Technical data
Table 6-3
Technical data
CPU and version
Order number
•
•
•
Memory
RAM
•
•
Load memory
Data storage life on the MMC
(following final programming)
Buffering
Execution times
Processing times of
•
•
•
•
Timers/counters and their retentivity
S7 counters
•
•
•
IEC Counters
•
•
S7 timers
•
•
•
IEC Timers
•
•
CPU 31xC and CPU 31x, Technical Data
Manual, 01/2006 Edition, A5E00105475-06
Technical data of CPU 312C
Hardware version
Firmware version
Associated programming package
Integrated
Expandable
Bit operations
Word instructions
Fixed-point arithmetic
Floating-point arithmetic
Retentive address areas
Default
Counting range
Type
Number
Retentive address areas
Default
Timer range
Type
Number
Technical data of CPU 31xC
6ES7 312-5BD01-0AB0
01
V2.0
STEP 7 as of V 5.2 + SP 1
(please use previous CPU for STEP 7 V 5.1 + SP
3 or later)
16 KB
No
Plugged in with MMC (Max. 4 MB)
At least 10 years
Guaranteed by MMC (maintenance-free)
Min. 0.2 μs
Min. 0.4 μs
Min. 5 μs
Min. 6 μs
128
Configurable
from C0 to C7
0 to 999
Yes
SFB
unlimited (limited only by RAM size)
128
Configurable
Not retentive
10 ms to 9990 s
Yes
SFB
unlimited (limited only by RAM size)
6.2 CPU 312C
6-3
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