Motorola 56F8346 User Manual page 62

Evaluation module
Table of Contents

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A
4
PORT_IDENT
P1
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
3
10
23
11
24
12
25
13
2
R53
P_RESET
5.1K
R54
47K
1
A
Figure A-11. Parallel JTAG Host Target Interface and JTAG Connector
B
Parallel JTAG Interface
U11
PORT_RESET
2
1A1
1Y1
PORT_TMS
4
1A2
1Y2
PORT_TCK
6
1A3
1Y3
PORT_TDI
8
1A4
1Y4
/PORT_TRST
11
2A1
2Y1
R47
PORT_DE
13
2A2
2Y2
5.1K
2A3
20
PORT_VCC
+5.0V
VCC
2A4
R60
1G
PORT_TDO
5
2Y3
51 Ohm
2G
R61
PORT_CONNECT
3
2Y4
GND
51 Ohm
MC74HC244DW
+3.3V
U9A
/J_RESET
1
R52
5.1K
2
/POR
74AC00
/J_RESET
U9C
9
Q1
2N2222A
/J_TRST
10
74AC00
B
C
D
U10
R3
18
2
1A1
R4
0 Ohm
16
4
1A2
R5
0 Ohm
14
6
1A3
R6
0 Ohm
12
8
1A4
R7
0 Ohm
9
11
2A1
0 Ohm
7
7
1
1
2Y2
15
5
2Y3
17
3
2Y4
+3.3V
1
20
VCC
/CCEN
19
1
1G
19
2G
10
R48
R49
JG9
5.1K
5.1K
MC74LCX244DW
R50
5.1K
On-Board
Host Target Interface
Disable
U9B
4
3
6
/RESET
5
74AC00
U9D
12
8
11
/TRST
13
74AC00
Title
PARALLEL JTAG HOST TARGET INTERFACE AND JTAG CONNECTOR
Document
DSP56F836EVM.DSN
Size
Number
B
Date:
Friday, January 24, 2003
C
D
E
P_RESET
18
1Y1
TMS
16
1Y2
TCK
14
1Y3
TDI
12
1Y4
/J_TRST
9
2Y1
+3.3V
P_DE
13
2A2
TDO
15
R58
2A3
TDO
PWR
17
2A4
47K
R57
PWR
47K
10
R56
GND
/DE
47K
R55
/J_TRST
47K
R51
P_DE
5.1K
J3
/DE
/J_TRST
13
14
+3.3V
11
12
/J_RESET
TMS
9
10
7
8
KEY
TCK
5
6
TDO
3
4
TDI
1
2
JTAG Connector
DSP Standard Products Division
2100 East Elliot Road
Tempe, Arizona 85284
(480) 413-5090 FAX: (480) 413-2510
Designer:
Sheet
of
DSPD Design
11
14
E
4
3
2
1
Rev.
1.0

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