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TS5, BCT-1510, BCT-1520,
BCT-1530
•
Pin Function (1/3)
PIN
SYMBOL
I2
1
I3
2
V
3
SSD1
TPLL
4
V
5
SSD2
I4
6
I5
7
I6
8
Q0
9
V
10
DDD1
Q1
11
Q2
12
Q3
13
Q4
14
V
15
SSD3
Q5
16
Q6
17
V
18
SSD4
V
19
DDD2
PRESET
20
P3
21
P2
22
P1
23
P0
24
V
25
DDD3
P5
26
P4
27
PDOCLK
28
PDO0
29
PDO1
30
PDO2
31
V
32
SSD5
PDO3
33
PDO4
34
PDO5
35
V
36
SSD6
V
37
SSD7
PDO6
38
38
I/O
I
digital I-input bit 2
I
digital I-input bit 3
−
digital ground 1 (core and input periphery)
I
test pin (normally connected to ground)
−
digital ground 2 (core and input periphery)
I
digital I-input bit 4
I
digital I-input bit 5
I
digital I-input bit 6
I
digital Q-input bit 0
−
digital supply voltage1 (core and input periphery)
I
digital Q-input bit 1
I
digital Q-input bit 2
I
digital Q-input bit 3
I
digital Q-input bit 4
−
digital ground 3 (core and input periphery)
I
digital Q-input bit 5
I
digital Q-input bit 6
−
digital ground 4 (output periphery)
−
digital supply voltage 2 (core and input periphery)
I
set device into default mode
I/O
quasi-bidirectional I/O port (bit 3)
I/O
quasi-bidirectional I/O port (bit 2)
I/O
quasi-bidirectional I/O port (bit 1)
I/O
quasi-bidirectional I/O port (bit 0)
−
digital supply voltage 3 (output periphery)
I/O
quasi-bidirectional I/O port (bit 5)
I/O
quasi-bidirectional I/O port (bit 4)
O
output clock for transport stream bytes
O
parallel data output (bit 0) - Serial data output
O
parallel data output (bit 1)
O
parallel data output (bit 2)
−
digital ground 5 (output periphery)
O
parallel data output (bit 3)
O
parallel data output (bit 4)
O
parallel data output (bit 5)
−
digital ground 6 (core and input periphery)
−
digital ground 7 (core and input periphery)
O
parallel data output (bit 6)
DESCRIPTION
(ADC bypass)
(ADC bypass)
(ADC bypass)
(ADC bypass)
(ADC bypass - MSB)
(ADC bypass - LSB)
(ADC bypass)
(ADC bypass)
(ADC bypass)
(ADC bypass)
(ADC bypass)
(ADC bypass - MSB)
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- Specifications
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