Pioneer MJ-D707 Service Manual page 58
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Also See for MJ-D707:
- Service manual (68 pages) ,
- Operating instructions manual (65 pages) ,
- Operating instructions manual (62 pages)
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MJ-D707, MJ-17D
QQ
3 7 63 1515 0
BD7910FV (IC116: CORE MAIN UNIT ASSY)
Head Driver
Block Diagram
20
19
18
17
16
1
2
3
4
Pin Function
No.
Name
1
VregIN
Regulator input and regulator power supply
2
RegGND
Regulator GND
3
RegSEL
Regulator selection terminal
4
VG
Power MOS drive voltage input
TE
L 13942296513
5
SVCC
EFM high-level output voltage
BR93LC56F (IC110: CORE MAIN UNIT ASSY)
EEPROM
Pin Assignment (Top view)
NC
1
2
Vcc
CS
3
SK
4
Pin Function
No. Name
1
NC
Not connected
2
Vcc
Power supply
3
CS
Chip selection input
4
SK
Serial clock input
www
5
DI
Start bit, operation code, address, and serial data input
6
DO
Serial data output, READY/BUSY internal status indication
output
.
7
GND
Ground
8
NC
Not connected
58
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15
14
13
12
11
Pre Driver
5
6
7
8
9
10
Description
8
NC
GND
7
DO
6
DI
5
Description
x
ao
y
i
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8
No.
Name
6
PDGND
Predrive GND
7
EFM
EFM signal input
8
MUTE
Mute control
9
N.C.
10
N.C.
Not used
11
N.C.
12
VOD2
Sink output (lower side power MOS drain)
13
VSS
H-bridge GND (lower side power MOS source)
14
VOD1
Sink output (lower side power MOS drain)
15
VOS1
Source output (upper side power MOS source)
16
VDD
H-bridge power supply (upper side power MOS drain)
17
VOS2
Source output (upper side power MOS source)
18 RegDRV
External PNP drive output for the regulator
19 RegOUT
Regulator output (emitter follower output)
Q Q
3
6 7
1 3
20
RegNF
Regulator feedback terminal
Block Diagram
High
1
NC
Voltage
Generation
Write
Inhibit
2
Vcc
Order Decode
Control
Clock Generation
CS
3
SK
4
u163
.
2 9
9 4
2 8
Description
1 5
0 5
8
2 9
9 4
2048bits
EEPROM Array
Address
R/W
Decoder
Amp.
Address
Data
Buffer
Register
Order
Dummy
Register
Bit
m
co
9 9
2 8
9 9
8
NC
7
GND
6
DO
5
DI
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