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A
B
1
SCHEMATIC DIAGRAM
DIGITAL: PROGRESSIVE SCAN
1800
D15
2806
B3
2812
B3
2800
B14
2807
B3
2813
B3
2802
B2
2808
B2
2814
C11
2
2803
B2
2809
B3
2815
C12
2804
B2
2810
B3
2816
C12
2805
B2
2811
B3
2817
F12
1
2
3
Progressive Scan
A
+3V3_FLI
3
B
GNDD
7800
MT48LC2M32B2TG
81
75
55
49
41
35
9
3
43
29
CONTROL BUS
VDDQ
VSS
67
+3V3_FLI
CKE
CLK4
68
CLK
GNDD
20
CS_
I868
WE
17
WE_
I869
CAS
18
CAS_
C
I870
RAS
19
RAS_
16
4
DQM0
71
DQM1
28
DQM2
59
DQM3
GNDD
I836
D
BA
22
BA0
I814
23
BA1
GNDD
ADDRESS BUS
D_ADDR(0)
25
A0
D_ADDR(1)
26
A1
D_ADDR(2)
27
SDRAM
A2
D_ADDR(3)
60
A3
D_ADDR(4)
61
A4
5
E
D_ADDR(5)
62
A5
D_ADDR(6)
63
A6
D_ADDR(7)
64
A7
D_ADDR(8)
65
A8
D_ADDR(9)
66
A9
D_ADDR(10)
24
A10
F
14
NC1
21
NC2
30
NC3
57
NC4
69
NC5
70
6
NC6
73
NC7
VSSQ
VSS
G
6
12 32 38 46 52
78 84
44 58 72 86
GNDD
H
7
1
2
3
C
D
2818
C7
2824
C14
2832
E12
2819
C8
2826
D11
2833
E12
2820
C9
2827
D12
2834
F14
2821
C14
2828
D12
2835
F10
2822
C9
2829
D14
2836
G10
2823
C9
2831
E11
2837
B8
4
5
6
DATA BUS
I2C BUS
GNDD
15
1
2
D_DATA(0)
DQ0
4
D_DATA(1)
RESETn
DQ1
5
D_DATA(2)
DQ2
7
D_DATA(3)
DQ3
8
D_DATA(4)
DQ4
7801
10
D_DATA(5)
ADV7196A
DQ5
11
D_DATA(6)
DQ6
13
D_DATA(7)
I824
DQ7
29 HSYNC_|SYNC_
HSOUT
74
D_DATA(15)
DQ8
I825
28 VSYNC_|TSYNC_
VSOUT
76
D_DATA(14)
DQ9
3810
27 DV|CLKOUT
GENERATOR
Yy_OUT(9:0)
+3V3_DD
77
D_DATA(13)
DQ10
10K
SYSCLK_PROGSCAN
79
D_DATA(12)
25
CLKIN
DQ11
80
D_DATA(11)
DQ12
I826
2 Y0
Yy_OUT(0)
82
D_DATA(10)
I827
DQ13
Yy_OUT(1)
3 Y1
83
D_DATA(9)
DQ14
I828
Yy_OUT(2)
4 Y2
85
D_DATA(8)
DQ15
I829
5 Y3
Yy_OUT(3)
31
D_DATA(22)
I830
DQ16
Yy_OUT(4)
6 Y4
TEST-
33
D_DATA(23)
DQ17
I831
Yy_OUT(5)
7 Y5
PATTERN
34
D_DATA(24)
DQ18
I832
GENERATOR
8 Y6
Yy_OUT(6)
36
D_DATA(25)
&
I833
DQ19
Yy_OUT(7)
9 Y7
37
DELAY
D_DATA(26)
DQ20
I834
Yy_OUT(8)
10
Y8
&
39
D_DATA(27)
DQ21
I835
11 Y9
GAMMA
Yy_OUT(9)
Cr_OUT(9:0)
40
D_DATA(28)
DQ22
Cr_OUT(0)
I846
14 CR0
CORRECTION
42
D_DATA(29)
DQ23
I803
Cr_OUT(1)
15 CR1
45
D_DATA(21)
DQ24
I805
Cr_OUT(2)
16 CR2
47
D_DATA(20)
DQ25
I815
Cr_OUT(3)
17
CR3
48
D_DATA(19)
DQ26
I816
Cr_OUT(4)
18 CR4
50
D_DATA(18)
DQ27
I817
Cr_OUT(5)
19 CR5
51
D_DATA(17)
DQ28
I847
Cr_OUT(6)
20
CR6
53
D_DATA(16)
DQ29
I848
Cr_OUT(7)
21 CR7
I851
54
DQ30
I849
Cr_OUT(8)
22
CR8
I852
56
DQ31
I850
Cr_OUT(9)
23 CR9
51 50 49
GNDD
GNDD
Cb_OUT(9:0)
4
5
6
E
F
3800
G4
3806
B8
3812
D14
3818
3801
C14
3807
C14
3813
D13
3819
3802
B8
3808
C14
3814
D13
3820
3803
C13
3809
D10
3815
E10
3821
3804
C13
3810
D6
3816
D14
3822
3805
C8
3811
D11
3817
E11
3823
7
8
9
10
5810
I819
+3V3
+3V3_DD
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
40
30
31
41
1
12
24 35
RESET
SCL
SDA
ALSB
VDD
VAA
2
I C MPU PORT
TIMING
SYNC
GEN
SHARPNESS
FILTER CTRL
&
ADAPTIVE
FILTER CTRL
11-BIT
DAC-A|Y
34
LUMA
SYNC
DAC
99 AF
I808
CGMS
I809
MACRO-
DAC-B
36
11-BIT
VISION
DAC
2X
INTER-
CHROMA
POLATION
11-BIT
DAC-C
32
4:2:2 TO 4:4:4
DAC
I812
( 99AF )
CHROMA
4:2:2 TO 4:4:4
I883
VREF
39
( 99AF )
DAC
RSET
38
CTRL
I813
BLOCK
COMP
37
I884
GND
AGND
48 47 46 45 44 43 42
13 52
26 33
DENC
GNDD
GNDD
GNDD
GNDD
7
8
9
10
G
H
E14
3824
F14
5801
B12
5807
E14
3825
F14
5802
B12
5808
E10
3826
F11
5803
D12
5809
E13
3827
F11
5804
D12
5810
E13
3828
G4
5805
D12
7800
F11
5800
B12
5806
E12
7801
11
12
13
+5V
2800
I871
I872
I800
100n
GNDD
I801
5800
5801
5802
7802
3
5
AD8061
6u8
10u
2u2
1
4
2
I876
3807
GNDD
1K
+5V
3808
GNDD
GNDD
GNDD
GNDD
GNDD
1K
2824
GNDD
I877
I878
100n
GNDD
5803
5804
5805
I806
7803-A
3
8
3809
AD8062
6u8
10u
2u2
1
1K2
2
GNDD
3811
4
1K2
I879
3816
GNDD
GNDD
1K
3818
GNDD
GNDD
GNDD
GNDD
GNDD
3815
1K
1K2
GNDD
+5V
GNDD
I880
3817
I881
5806
5807
5808
I810
7803-B
1K2
5
8
AD8062
GNDD
6u8
10u
2u2
7
6
3820
4
1K2
I882
3824
GNDD
3823
GNDD
1K
1K2
3825
GNDD
GNDD
GNDD
GNDD
GNDD
GNDD
I818
2835
5809
1K
+3V3_ANA
+3V3
GNDD
100n
3826
3827
2K2
270R
GNDD
GNDD
2836
+3V3_ANA
100n
11
12
13
I
J
DRX-1
E12
7802
B14
E12
7803-A D14
F12
7803-B E14
B8
B1
C6
14
15
A
B
I802
I821
3801
75R
C
OPTION
GNDD
1800
FMN
1
2
I807
I822
3812
D
3
75R
4
5
OPTION
6
7
GNDD
GNDD
E
I811
3819
75R
I823
OPTION
F
GNDD
G
H
14
15
185
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